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author | 2023-09-11 06:51:28 -0700 | |
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committer | 2023-09-12 08:22:24 +0200 | |
commit | 950ecdc672aec9cd29036b2e2535b07c103af494 (patch) | |
tree | b142698c6f7b06d2c65ddef4f2a9ded4def7e2af /usr | |
parent | perf/x86/intel: Add common intel_pmu_init_hybrid() (diff) | |
download | linux-950ecdc672aec9cd29036b2e2535b07c103af494.tar.gz linux-950ecdc672aec9cd29036b2e2535b07c103af494.tar.bz2 linux-950ecdc672aec9cd29036b2e2535b07c103af494.zip |
perf/x86/intel: Fix broken fixed event constraints extension
Unnecessary multiplexing is triggered when running an "instructions"
event on an MTL.
perf stat -e cpu_core/instructions/,cpu_core/instructions/ -a sleep 1
Performance counter stats for 'system wide':
115,489,000 cpu_core/instructions/ (50.02%)
127,433,777 cpu_core/instructions/ (49.98%)
1.002294504 seconds time elapsed
Linux architectural perf events, e.g., cycles and instructions, usually
have dedicated fixed counters. These events also have equivalent events
which can be used in the general-purpose counters. The counters are
precious. In the intel_pmu_check_event_constraints(), perf check/extend
the event constraints of these events. So these events can utilize both
fixed counters and general-purpose counters.
The following cleanup commit:
97588df87b56 ("perf/x86/intel: Add common intel_pmu_init_hybrid()")
forgot adding the intel_pmu_check_event_constraints() into update_pmu_cap().
The architectural perf events cannot utilize the general-purpose counters.
The code to check and update the counters, event constraints and
extra_regs is the same among hybrid systems. Move
intel_pmu_check_hybrid_pmus() to init_hybrid_pmu(), and
emove the duplicate check in update_pmu_cap().
Fixes: 97588df87b56 ("perf/x86/intel: Add common intel_pmu_init_hybrid()")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20230911135128.2322833-1-kan.liang@linux.intel.com
Diffstat (limited to 'usr')
0 files changed, 0 insertions, 0 deletions