diff options
Diffstat (limited to 'drivers/soc')
47 files changed, 2026 insertions, 196 deletions
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig index 4e176280113a..d21e75d69294 100644 --- a/drivers/soc/Kconfig +++ b/drivers/soc/Kconfig @@ -10,6 +10,7 @@ source "drivers/soc/bcm/Kconfig" source "drivers/soc/canaan/Kconfig" source "drivers/soc/fsl/Kconfig" source "drivers/soc/fujitsu/Kconfig" +source "drivers/soc/hisilicon/Kconfig" source "drivers/soc/imx/Kconfig" source "drivers/soc/ixp4xx/Kconfig" source "drivers/soc/litex/Kconfig" diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index 708eaad8f590..0706a27d13be 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_MACH_DOVE) += dove/ obj-y += fsl/ obj-y += fujitsu/ obj-$(CONFIG_ARCH_GEMINI) += gemini/ +obj-y += hisilicon/ obj-y += imx/ obj-y += ixp4xx/ obj-$(CONFIG_SOC_XWAY) += lantiq/ diff --git a/drivers/soc/amlogic/meson-canvas.c b/drivers/soc/amlogic/meson-canvas.c index 383b0cfc584e..b6e06c4d2117 100644 --- a/drivers/soc/amlogic/meson-canvas.c +++ b/drivers/soc/amlogic/meson-canvas.c @@ -8,6 +8,7 @@ #include <linux/kernel.h> #include <linux/mfd/syscon.h> #include <linux/module.h> +#include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/soc/amlogic/meson-canvas.h> #include <linux/of_address.h> diff --git a/drivers/soc/hisilicon/Kconfig b/drivers/soc/hisilicon/Kconfig new file mode 100644 index 000000000000..0ab688af308f --- /dev/null +++ b/drivers/soc/hisilicon/Kconfig @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: GPL-2.0-only + +menu "Hisilicon SoC drivers" + depends on ARCH_HISI || COMPILE_TEST + +config KUNPENG_HCCS + tristate "HCCS driver on Kunpeng SoC" + depends on ACPI + depends on MAILBOX + depends on ARM64 || COMPILE_TEST + help + The Huawei Cache Coherence System (HCCS) is a multi-chip + interconnection bus protocol. + The performance of application may be affected if some HCCS + ports are not in full lane status, have a large number of CRC + errors and so on. + + Say M here if you want to include support for querying the + health status and port information of HCCS on Kunpeng SoC. + +endmenu diff --git a/drivers/soc/hisilicon/Makefile b/drivers/soc/hisilicon/Makefile new file mode 100644 index 000000000000..226e747e70d6 --- /dev/null +++ b/drivers/soc/hisilicon/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_KUNPENG_HCCS) += kunpeng_hccs.o diff --git a/drivers/soc/hisilicon/kunpeng_hccs.c b/drivers/soc/hisilicon/kunpeng_hccs.c new file mode 100644 index 000000000000..f3810d9d1caa --- /dev/null +++ b/drivers/soc/hisilicon/kunpeng_hccs.c @@ -0,0 +1,1276 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * The Huawei Cache Coherence System (HCCS) is a multi-chip interconnection + * bus protocol. + * + * Copyright (c) 2023 Hisilicon Limited. + * Author: Huisong Li <lihuisong@huawei.com> + * + * HCCS driver for Kunpeng SoC provides the following features: + * - Retrieve the following information about each port: + * - port type + * - lane mode + * - enable + * - current lane mode + * - link finite state machine + * - lane mask + * - CRC error count + * + * - Retrieve the following information about all the ports on the chip or + * the die: + * - if all enabled ports are in linked + * - if all linked ports are in full lane + * - CRC error count sum + */ +#include <linux/acpi.h> +#include <linux/iopoll.h> +#include <linux/platform_device.h> +#include <linux/sysfs.h> + +#include <acpi/pcc.h> + +#include "kunpeng_hccs.h" + +/* PCC defines */ +#define HCCS_PCC_SIGNATURE_MASK 0x50434300 +#define HCCS_PCC_STATUS_CMD_COMPLETE BIT(0) + +/* + * Arbitrary retries in case the remote processor is slow to respond + * to PCC commands + */ +#define HCCS_PCC_CMD_WAIT_RETRIES_NUM 500ULL +#define HCCS_POLL_STATUS_TIME_INTERVAL_US 3 + +static struct hccs_port_info *kobj_to_port_info(struct kobject *k) +{ + return container_of(k, struct hccs_port_info, kobj); +} + +static struct hccs_die_info *kobj_to_die_info(struct kobject *k) +{ + return container_of(k, struct hccs_die_info, kobj); +} + +static struct hccs_chip_info *kobj_to_chip_info(struct kobject *k) +{ + return container_of(k, struct hccs_chip_info, kobj); +} + +struct hccs_register_ctx { + struct device *dev; + u8 chan_id; + int err; +}; + +static acpi_status hccs_get_register_cb(struct acpi_resource *ares, + void *context) +{ + struct acpi_resource_generic_register *reg; + struct hccs_register_ctx *ctx = context; + + if (ares->type != ACPI_RESOURCE_TYPE_GENERIC_REGISTER) + return AE_OK; + + reg = &ares->data.generic_reg; + if (reg->space_id != ACPI_ADR_SPACE_PLATFORM_COMM) { + dev_err(ctx->dev, "Bad register resource.\n"); + ctx->err = -EINVAL; + return AE_ERROR; + } + ctx->chan_id = reg->access_size; + + return AE_OK; +} + +static int hccs_get_pcc_chan_id(struct hccs_dev *hdev) +{ + acpi_handle handle = ACPI_HANDLE(hdev->dev); + struct hccs_register_ctx ctx = {0}; + acpi_status status; + + if (!acpi_has_method(handle, METHOD_NAME__CRS)) + return -ENODEV; + + ctx.dev = hdev->dev; + status = acpi_walk_resources(handle, METHOD_NAME__CRS, + hccs_get_register_cb, &ctx); + if (ACPI_FAILURE(status)) + return ctx.err; + hdev->chan_id = ctx.chan_id; + + return 0; +} + +static void hccs_chan_tx_done(struct mbox_client *cl, void *msg, int ret) +{ + if (ret < 0) + pr_debug("TX did not complete: CMD sent:0x%x, ret:%d\n", + *(u8 *)msg, ret); + else + pr_debug("TX completed. CMD sent:0x%x, ret:%d\n", + *(u8 *)msg, ret); +} + +static void hccs_unregister_pcc_channel(struct hccs_dev *hdev) +{ + struct hccs_mbox_client_info *cl_info = &hdev->cl_info; + + if (cl_info->pcc_comm_addr) + iounmap(cl_info->pcc_comm_addr); + pcc_mbox_free_channel(hdev->cl_info.pcc_chan); +} + +static int hccs_register_pcc_channel(struct hccs_dev *hdev) +{ + struct hccs_mbox_client_info *cl_info = &hdev->cl_info; + struct mbox_client *cl = &cl_info->client; + struct pcc_mbox_chan *pcc_chan; + struct device *dev = hdev->dev; + int rc; + + cl->dev = dev; + cl->tx_block = false; + cl->knows_txdone = true; + cl->tx_done = hccs_chan_tx_done; + pcc_chan = pcc_mbox_request_channel(cl, hdev->chan_id); + if (IS_ERR(pcc_chan)) { + dev_err(dev, "PPC channel request failed.\n"); + rc = -ENODEV; + goto out; + } + cl_info->pcc_chan = pcc_chan; + cl_info->mbox_chan = pcc_chan->mchan; + + /* + * pcc_chan->latency is just a nominal value. In reality the remote + * processor could be much slower to reply. So add an arbitrary amount + * of wait on top of nominal. + */ + cl_info->deadline_us = + HCCS_PCC_CMD_WAIT_RETRIES_NUM * pcc_chan->latency; + if (cl_info->mbox_chan->mbox->txdone_irq) { + dev_err(dev, "PCC IRQ in PCCT is enabled.\n"); + rc = -EINVAL; + goto err_mbx_channel_free; + } + + if (pcc_chan->shmem_base_addr) { + cl_info->pcc_comm_addr = ioremap(pcc_chan->shmem_base_addr, + pcc_chan->shmem_size); + if (!cl_info->pcc_comm_addr) { + dev_err(dev, "Failed to ioremap PCC communication region for channel-%d.\n", + hdev->chan_id); + rc = -ENOMEM; + goto err_mbx_channel_free; + } + } + + return 0; + +err_mbx_channel_free: + pcc_mbox_free_channel(cl_info->pcc_chan); +out: + return rc; +} + +static int hccs_check_chan_cmd_complete(struct hccs_dev *hdev) +{ + struct hccs_mbox_client_info *cl_info = &hdev->cl_info; + struct acpi_pcct_shared_memory __iomem *comm_base = + cl_info->pcc_comm_addr; + u16 status; + int ret; + + /* + * Poll PCC status register every 3us(delay_us) for maximum of + * deadline_us(timeout_us) until PCC command complete bit is set(cond) + */ + ret = readw_poll_timeout(&comm_base->status, status, + status & HCCS_PCC_STATUS_CMD_COMPLETE, + HCCS_POLL_STATUS_TIME_INTERVAL_US, + cl_info->deadline_us); + if (unlikely(ret)) + dev_err(hdev->dev, "poll PCC status failed, ret = %d.\n", ret); + + return ret; +} + +static int hccs_pcc_cmd_send(struct hccs_dev *hdev, u8 cmd, + struct hccs_desc *desc) +{ + struct hccs_mbox_client_info *cl_info = &hdev->cl_info; + void __iomem *comm_space = cl_info->pcc_comm_addr + + sizeof(struct acpi_pcct_shared_memory); + struct hccs_fw_inner_head *fw_inner_head; + struct acpi_pcct_shared_memory tmp = {0}; + u16 comm_space_size; + int ret; + + /* Write signature for this subspace */ + tmp.signature = HCCS_PCC_SIGNATURE_MASK | hdev->chan_id; + /* Write to the shared command region */ + tmp.command = cmd; + /* Clear cmd complete bit */ + tmp.status = 0; + memcpy_toio(cl_info->pcc_comm_addr, (void *)&tmp, + sizeof(struct acpi_pcct_shared_memory)); + + /* Copy the message to the PCC comm space */ + comm_space_size = HCCS_PCC_SHARE_MEM_BYTES - + sizeof(struct acpi_pcct_shared_memory); + memcpy_toio(comm_space, (void *)desc, comm_space_size); + + /* Ring doorbell */ + ret = mbox_send_message(cl_info->mbox_chan, &cmd); + if (ret < 0) { + dev_err(hdev->dev, "Send PCC mbox message failed, ret = %d.\n", + ret); + goto end; + } + + /* Wait for completion */ + ret = hccs_check_chan_cmd_complete(hdev); + if (ret) + goto end; + + /* Copy response data */ + memcpy_fromio((void *)desc, comm_space, comm_space_size); + fw_inner_head = &desc->rsp.fw_inner_head; + if (fw_inner_head->retStatus) { + dev_err(hdev->dev, "Execute PCC command failed, error code = %u.\n", + fw_inner_head->retStatus); + ret = -EIO; + } + +end: + mbox_client_txdone(cl_info->mbox_chan, ret); + return ret; +} + +static void hccs_init_req_desc(struct hccs_desc *desc) +{ + struct hccs_req_desc *req = &desc->req; + + memset(desc, 0, sizeof(*desc)); + req->req_head.module_code = HCCS_SERDES_MODULE_CODE; +} + +static int hccs_get_dev_caps(struct hccs_dev *hdev) +{ + struct hccs_desc desc; + int ret; + + hccs_init_req_desc(&desc); + ret = hccs_pcc_cmd_send(hdev, HCCS_GET_DEV_CAP, &desc); + if (ret) { + dev_err(hdev->dev, "Get device capabilities failed, ret = %d.\n", + ret); + return ret; + } + memcpy(&hdev->caps, desc.rsp.data, sizeof(hdev->caps)); + + return 0; +} + +static int hccs_query_chip_num_on_platform(struct hccs_dev *hdev) +{ + struct hccs_desc desc; + int ret; + + hccs_init_req_desc(&desc); + ret = hccs_pcc_cmd_send(hdev, HCCS_GET_CHIP_NUM, &desc); + if (ret) { + dev_err(hdev->dev, "query system chip number failed, ret = %d.\n", + ret); + return ret; + } + + hdev->chip_num = *((u8 *)&desc.rsp.data); + if (!hdev->chip_num) { + dev_err(hdev->dev, "chip num obtained from firmware is zero.\n"); + return -EINVAL; + } + + return 0; +} + +static int hccs_get_chip_info(struct hccs_dev *hdev, + struct hccs_chip_info *chip) +{ + struct hccs_die_num_req_param *req_param; + struct hccs_desc desc; + int ret; + + hccs_init_req_desc(&desc); + req_param = (struct hccs_die_num_req_param *)desc.req.data; + req_param->chip_id = chip->chip_id; + ret = hccs_pcc_cmd_send(hdev, HCCS_GET_DIE_NUM, &desc); + if (ret) + return ret; + + chip->die_num = *((u8 *)&desc.rsp.data); + + return 0; +} + +static int hccs_query_chip_info_on_platform(struct hccs_dev *hdev) +{ + struct hccs_chip_info *chip; + int ret; + u8 idx; + + ret = hccs_query_chip_num_on_platform(hdev); + if (ret) { + dev_err(hdev->dev, "query chip number on platform failed, ret = %d.\n", + ret); + return ret; + } + + hdev->chips = devm_kzalloc(hdev->dev, + hdev->chip_num * sizeof(struct hccs_chip_info), + GFP_KERNEL); + if (!hdev->chips) { + dev_err(hdev->dev, "allocate all chips memory failed.\n"); + return -ENOMEM; + } + + for (idx = 0; idx < hdev->chip_num; idx++) { + chip = &hdev->chips[idx]; + chip->chip_id = idx; + ret = hccs_get_chip_info(hdev, chip); + if (ret) { + dev_err(hdev->dev, "get chip%u info failed, ret = %d.\n", + idx, ret); + return ret; + } + chip->hdev = hdev; + } + + return 0; +} + +static int hccs_query_die_info_on_chip(struct hccs_dev *hdev, u8 chip_id, + u8 die_idx, struct hccs_die_info *die) +{ + struct hccs_die_info_req_param *req_param; + struct hccs_die_info_rsp_data *rsp_data; + struct hccs_desc desc; + int ret; + + hccs_init_req_desc(&desc); + req_param = (struct hccs_die_info_req_param *)desc.req.data; + req_param->chip_id = chip_id; + req_param->die_idx = die_idx; + ret = hccs_pcc_cmd_send(hdev, HCCS_GET_DIE_INFO, &desc); + if (ret) + return ret; + + rsp_data = (struct hccs_die_info_rsp_data *)desc.rsp.data; + die->die_id = rsp_data->die_id; + die->port_num = rsp_data->port_num; + die->min_port_id = rsp_data->min_port_id; + die->max_port_id = rsp_data->max_port_id; + if (die->min_port_id > die->max_port_id) { + dev_err(hdev->dev, "min port id(%u) > max port id(%u) on die_idx(%u).\n", + die->min_port_id, die->max_port_id, die_idx); + return -EINVAL; + } + if (die->max_port_id > HCCS_DIE_MAX_PORT_ID) { + dev_err(hdev->dev, "max port id(%u) on die_idx(%u) is too big.\n", + die->max_port_id, die_idx); + return -EINVAL; + } + + return 0; +} + +static int hccs_query_all_die_info_on_platform(struct hccs_dev *hdev) +{ + struct device *dev = hdev->dev; + struct hccs_chip_info *chip; + struct hccs_die_info *die; + u8 i, j; + int ret; + + for (i = 0; i < hdev->chip_num; i++) { + chip = &hdev->chips[i]; + if (!chip->die_num) + continue; + + chip->dies = devm_kzalloc(hdev->dev, + chip->die_num * sizeof(struct hccs_die_info), + GFP_KERNEL); + if (!chip->dies) { + dev_err(dev, "allocate all dies memory on chip%u failed.\n", + i); + return -ENOMEM; + } + + for (j = 0; j < chip->die_num; j++) { + die = &chip->dies[j]; + ret = hccs_query_die_info_on_chip(hdev, i, j, die); + if (ret) { + dev_err(dev, "get die idx (%u) info on chip%u failed, ret = %d.\n", + j, i, ret); + return ret; + } + die->chip = chip; + } + } + + return 0; +} + +static int hccs_get_bd_info(struct hccs_dev *hdev, u8 opcode, + struct hccs_desc *desc, + void *buf, size_t buf_len, + struct hccs_rsp_head *rsp_head) +{ + struct hccs_rsp_head *head; + struct hccs_rsp_desc *rsp; + int ret; + + ret = hccs_pcc_cmd_send(hdev, opcode, desc); + if (ret) + return ret; + + rsp = &desc->rsp; + head = &rsp->rsp_head; + if (head->data_len > buf_len) { + dev_err(hdev->dev, + "buffer overflow (buf_len = %zu, data_len = %u)!\n", + buf_len, head->data_len); + return -ENOMEM; + } + + memcpy(buf, rsp->data, head->data_len); + *rsp_head = *head; + + return 0; +} + +static int hccs_get_all_port_attr(struct hccs_dev *hdev, + struct hccs_die_info *die, + struct hccs_port_attr *attrs, u16 size) +{ + struct hccs_die_comm_req_param *req_param; + struct hccs_req_head *req_head; + struct hccs_rsp_head rsp_head; + struct hccs_desc desc; + size_t left_buf_len; + u32 data_len = 0; + u8 start_id; + u8 *buf; + int ret; + + buf = (u8 *)attrs; + left_buf_len = sizeof(struct hccs_port_attr) * size; + start_id = die->min_port_id; + while (start_id <= die->max_port_id) { + hccs_init_req_desc(&desc); + req_head = &desc.req.req_head; + req_head->start_id = start_id; + req_param = (struct hccs_die_comm_req_param *)desc.req.data; + req_param->chip_id = die->chip->chip_id; + req_param->die_id = die->die_id; + + ret = hccs_get_bd_info(hdev, HCCS_GET_DIE_PORT_INFO, &desc, + buf + data_len, left_buf_len, &rsp_head); + if (ret) { + dev_err(hdev->dev, + "get the information of port%u on die%u failed, ret = %d.\n", + start_id, die->die_id, ret); + return ret; + } + + data_len += rsp_head.data_len; + left_buf_len -= rsp_head.data_len; + if (unlikely(rsp_head.next_id <= start_id)) { + dev_err(hdev->dev, + "next port id (%u) is not greater than last start id (%u) on die%u.\n", + rsp_head.next_id, start_id, die->die_id); + return -EINVAL; + } + start_id = rsp_head.next_id; + } + + return 0; +} + +static int hccs_get_all_port_info_on_die(struct hccs_dev *hdev, + struct hccs_die_info *die) +{ + struct hccs_port_attr *attrs; + struct hccs_port_info *port; + int ret; + u8 i; + + attrs = kcalloc(die->port_num, sizeof(struct hccs_port_attr), + GFP_KERNEL); + if (!attrs) + return -ENOMEM; + + ret = hccs_get_all_port_attr(hdev, die, attrs, die->port_num); + if (ret) + goto out; + + for (i = 0; i < die->port_num; i++) { + port = &die->ports[i]; + port->port_id = attrs[i].port_id; + port->port_type = attrs[i].port_type; + port->lane_mode = attrs[i].lane_mode; + port->enable = attrs[i].enable; + port->die = die; + } + +out: + kfree(attrs); + return ret; +} + +static int hccs_query_all_port_info_on_platform(struct hccs_dev *hdev) +{ + + struct device *dev = hdev->dev; + struct hccs_chip_info *chip; + struct hccs_die_info *die; + u8 i, j; + int ret; + + for (i = 0; i < hdev->chip_num; i++) { + chip = &hdev->chips[i]; + for (j = 0; j < chip->die_num; j++) { + die = &chip->dies[j]; + if (!die->port_num) + continue; + + die->ports = devm_kzalloc(dev, + die->port_num * sizeof(struct hccs_port_info), + GFP_KERNEL); + if (!die->ports) { + dev_err(dev, "allocate ports memory on chip%u/die%u failed.\n", + i, die->die_id); + return -ENOMEM; + } + + ret = hccs_get_all_port_info_on_die(hdev, die); + if (ret) { + dev_err(dev, "get all port info on chip%u/die%u failed, ret = %d.\n", + i, die->die_id, ret); + return ret; + } + } + } + + return 0; +} + +static int hccs_get_hw_info(struct hccs_dev *hdev) +{ + int ret; + + ret = hccs_query_chip_info_on_platform(hdev); + if (ret) { + dev_err(hdev->dev, "query chip info on platform failed, ret = %d.\n", + ret); + return ret; + } + + ret = hccs_query_all_die_info_on_platform(hdev); + if (ret) { + dev_err(hdev->dev, "query all die info on platform failed, ret = %d.\n", + ret); + return ret; + } + + ret = hccs_query_all_port_info_on_platform(hdev); + if (ret) { + dev_err(hdev->dev, "query all port info on platform failed, ret = %d.\n", + ret); + return ret; + } + + return 0; +} + +static int hccs_query_port_link_status(struct hccs_dev *hdev, + const struct hccs_port_info *port, + struct hccs_link_status *link_status) +{ + const struct hccs_die_info *die = port->die; + const struct hccs_chip_info *chip = die->chip; + struct hccs_port_comm_req_param *req_param; + struct hccs_desc desc; + int ret; + + hccs_init_req_desc(&desc); + req_param = (struct hccs_port_comm_req_param *)desc.req.data; + req_param->chip_id = chip->chip_id; + req_param->die_id = die->die_id; + req_param->port_id = port->port_id; + ret = hccs_pcc_cmd_send(hdev, HCCS_GET_PORT_LINK_STATUS, &desc); + if (ret) { + dev_err(hdev->dev, + "get port link status info failed, ret = %d.\n", ret); + return ret; + } + + *link_status = *((struct hccs_link_status *)desc.rsp.data); + + return 0; +} + +static int hccs_query_port_crc_err_cnt(struct hccs_dev *hdev, + const struct hccs_port_info *port, + u64 *crc_err_cnt) +{ + const struct hccs_die_info *die = port->die; + const struct hccs_chip_info *chip = die->chip; + struct hccs_port_comm_req_param *req_param; + struct hccs_desc desc; + int ret; + + hccs_init_req_desc(&desc); + req_param = (struct hccs_port_comm_req_param *)desc.req.data; + req_param->chip_id = chip->chip_id; + req_param->die_id = die->die_id; + req_param->port_id = port->port_id; + ret = hccs_pcc_cmd_send(hdev, HCCS_GET_PORT_CRC_ERR_CNT, &desc); + if (ret) { + dev_err(hdev->dev, + "get port crc error count failed, ret = %d.\n", ret); + return ret; + } + + memcpy(crc_err_cnt, &desc.rsp.data, sizeof(u64)); + + return 0; +} + +static int hccs_get_die_all_link_status(struct hccs_dev *hdev, + const struct hccs_die_info *die, + u8 *all_linked) +{ + struct hccs_die_comm_req_param *req_param; + struct hccs_desc desc; + int ret; + + if (die->port_num == 0) { + *all_linked = 1; + return 0; + } + + hccs_init_req_desc(&desc); + req_param = (struct hccs_die_comm_req_param *)desc.req.data; + req_param->chip_id = die->chip->chip_id; + req_param->die_id = die->die_id; + ret = hccs_pcc_cmd_send(hdev, HCCS_GET_DIE_PORTS_LINK_STA, &desc); + if (ret) { + dev_err(hdev->dev, + "get link status of all ports failed on die%u, ret = %d.\n", + die->die_id, ret); + return ret; + } + + *all_linked = *((u8 *)&desc.rsp.data); + + return 0; +} + +static int hccs_get_die_all_port_lane_status(struct hccs_dev *hdev, + const struct hccs_die_info *die, + u8 *full_lane) +{ + struct hccs_die_comm_req_param *req_param; + struct hccs_desc desc; + int ret; + + if (die->port_num == 0) { + *full_lane = 1; + return 0; + } + + hccs_init_req_desc(&desc); + req_param = (struct hccs_die_comm_req_param *)desc.req.data; + req_param->chip_id = die->chip->chip_id; + req_param->die_id = die->die_id; + ret = hccs_pcc_cmd_send(hdev, HCCS_GET_DIE_PORTS_LANE_STA, &desc); + if (ret) { + dev_err(hdev->dev, "get lane status of all ports failed on die%u, ret = %d.\n", + die->die_id, ret); + return ret; + } + + *full_lane = *((u8 *)&desc.rsp.data); + + return 0; +} + +static int hccs_get_die_total_crc_err_cnt(struct hccs_dev *hdev, + const struct hccs_die_info *die, + u64 *total_crc_err_cnt) +{ + struct hccs_die_comm_req_param *req_param; + struct hccs_desc desc; + int ret; + + if (die->port_num == 0) { + *total_crc_err_cnt = 0; + return 0; + } + + hccs_init_req_desc(&desc); + req_param = (struct hccs_die_comm_req_param *)desc.req.data; + req_param->chip_id = die->chip->chip_id; + req_param->die_id = die->die_id; + ret = hccs_pcc_cmd_send(hdev, HCCS_GET_DIE_PORTS_CRC_ERR_CNT, &desc); + if (ret) { + dev_err(hdev->dev, "get crc error count sum failed on die%u, ret = %d.\n", + die->die_id, ret); + return ret; + } + + memcpy(total_crc_err_cnt, &desc.rsp.data, sizeof(u64)); + + return 0; +} + +static ssize_t hccs_show(struct kobject *k, struct attribute *attr, char *buf) +{ + struct kobj_attribute *kobj_attr; + + kobj_attr = container_of(attr, struct kobj_attribute, attr); + + return kobj_attr->show(k, kobj_attr, buf); +} + +static const struct sysfs_ops hccs_comm_ops = { + .show = hccs_show, +}; + +static ssize_t type_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + const struct hccs_port_info *port = kobj_to_port_info(kobj); + + return sysfs_emit(buf, "HCCS-v%u\n", port->port_type); +} +static struct kobj_attribute hccs_type_attr = __ATTR_RO(type); + +static ssize_t lane_mode_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + const struct hccs_port_info *port = kobj_to_port_info(kobj); + + return sysfs_emit(buf, "x%u\n", port->lane_mode); +} +static struct kobj_attribute lane_mode_attr = __ATTR_RO(lane_mode); + +static ssize_t enable_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + const struct hccs_port_info *port = kobj_to_port_info(kobj); + + return sysfs_emit(buf, "%u\n", port->enable); +} +static struct kobj_attribute port_enable_attr = __ATTR_RO(enable); + +static ssize_t cur_lane_num_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + const struct hccs_port_info *port = kobj_to_port_info(kobj); + struct hccs_dev *hdev = port->die->chip->hdev; + struct hccs_link_status link_status = {0}; + int ret; + + mutex_lock(&hdev->lock); + ret = hccs_query_port_link_status(hdev, port, &link_status); + mutex_unlock(&hdev->lock); + if (ret) + return ret; + + return sysfs_emit(buf, "%u\n", link_status.lane_num); +} +static struct kobj_attribute cur_lane_num_attr = __ATTR_RO(cur_lane_num); + +static ssize_t link_fsm_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + const struct hccs_port_info *port = kobj_to_port_info(kobj); + struct hccs_dev *hdev = port->die->chip->hdev; + struct hccs_link_status link_status = {0}; + const struct { + u8 link_fsm; + char *str; + } link_fsm_map[] = { + {HCCS_PORT_RESET, "reset"}, + {HCCS_PORT_SETUP, "setup"}, + {HCCS_PORT_CONFIG, "config"}, + {HCCS_PORT_READY, "link-up"}, + }; + const char *link_fsm_str = "unknown"; + size_t i; + int ret; + + mutex_lock(&hdev->lock); + ret = hccs_query_port_link_status(hdev, port, &link_status); + mutex_unlock(&hdev->lock); + if (ret) + return ret; + + for (i = 0; i < ARRAY_SIZE(link_fsm_map); i++) { + if (link_fsm_map[i].link_fsm == link_status.link_fsm) { + link_fsm_str = link_fsm_map[i].str; + break; + } + } + + return sysfs_emit(buf, "%s\n", link_fsm_str); +} +static struct kobj_attribute link_fsm_attr = __ATTR_RO(link_fsm); + +static ssize_t lane_mask_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + const struct hccs_port_info *port = kobj_to_port_info(kobj); + struct hccs_dev *hdev = port->die->chip->hdev; + struct hccs_link_status link_status = {0}; + int ret; + + mutex_lock(&hdev->lock); + ret = hccs_query_port_link_status(hdev, port, &link_status); + mutex_unlock(&hdev->lock); + if (ret) + return ret; + + return sysfs_emit(buf, "0x%x\n", link_status.lane_mask); +} +static struct kobj_attribute lane_mask_attr = __ATTR_RO(lane_mask); + +static ssize_t crc_err_cnt_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + const struct hccs_port_info *port = kobj_to_port_info(kobj); + struct hccs_dev *hdev = port->die->chip->hdev; + u64 crc_err_cnt; + int ret; + + mutex_lock(&hdev->lock); + ret = hccs_query_port_crc_err_cnt(hdev, port, &crc_err_cnt); + mutex_unlock(&hdev->lock); + if (ret) + return ret; + + return sysfs_emit(buf, "%llu\n", crc_err_cnt); +} +static struct kobj_attribute crc_err_cnt_attr = __ATTR_RO(crc_err_cnt); + +static struct attribute *hccs_port_default_attrs[] = { + &hccs_type_attr.attr, + &lane_mode_attr.attr, + &port_enable_attr.attr, + &cur_lane_num_attr.attr, + &link_fsm_attr.attr, + &lane_mask_attr.attr, + &crc_err_cnt_attr.attr, + NULL, +}; +ATTRIBUTE_GROUPS(hccs_port_default); + +static const struct kobj_type hccs_port_type = { + .sysfs_ops = &hccs_comm_ops, + .default_groups = hccs_port_default_groups, +}; + +static ssize_t all_linked_on_die_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + const struct hccs_die_info *die = kobj_to_die_info(kobj); + struct hccs_dev *hdev = die->chip->hdev; + u8 all_linked; + int ret; + + mutex_lock(&hdev->lock); + ret = hccs_get_die_all_link_status(hdev, die, &all_linked); + mutex_unlock(&hdev->lock); + if (ret) + return ret; + + return sysfs_emit(buf, "%u\n", all_linked); +} +static struct kobj_attribute all_linked_on_die_attr = + __ATTR(all_linked, 0444, all_linked_on_die_show, NULL); + +static ssize_t linked_full_lane_on_die_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + const struct hccs_die_info *die = kobj_to_die_info(kobj); + struct hccs_dev *hdev = die->chip->hdev; + u8 full_lane; + int ret; + + mutex_lock(&hdev->lock); + ret = hccs_get_die_all_port_lane_status(hdev, die, &full_lane); + mutex_unlock(&hdev->lock); + if (ret) + return ret; + + return sysfs_emit(buf, "%u\n", full_lane); +} +static struct kobj_attribute linked_full_lane_on_die_attr = + __ATTR(linked_full_lane, 0444, linked_full_lane_on_die_show, NULL); + +static ssize_t crc_err_cnt_sum_on_die_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + const struct hccs_die_info *die = kobj_to_die_info(kobj); + struct hccs_dev *hdev = die->chip->hdev; + u64 total_crc_err_cnt; + int ret; + + mutex_lock(&hdev->lock); + ret = hccs_get_die_total_crc_err_cnt(hdev, die, &total_crc_err_cnt); + mutex_unlock(&hdev->lock); + if (ret) + return ret; + + return sysfs_emit(buf, "%llu\n", total_crc_err_cnt); +} +static struct kobj_attribute crc_err_cnt_sum_on_die_attr = + __ATTR(crc_err_cnt, 0444, crc_err_cnt_sum_on_die_show, NULL); + +static struct attribute *hccs_die_default_attrs[] = { + &all_linked_on_die_attr.attr, + &linked_full_lane_on_die_attr.attr, + &crc_err_cnt_sum_on_die_attr.attr, + NULL, +}; +ATTRIBUTE_GROUPS(hccs_die_default); + +static const struct kobj_type hccs_die_type = { + .sysfs_ops = &hccs_comm_ops, + .default_groups = hccs_die_default_groups, +}; + +static ssize_t all_linked_on_chip_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + const struct hccs_chip_info *chip = kobj_to_chip_info(kobj); + struct hccs_dev *hdev = chip->hdev; + const struct hccs_die_info *die; + u8 all_linked = 1; + u8 i, tmp; + int ret; + + mutex_lock(&hdev->lock); + for (i = 0; i < chip->die_num; i++) { + die = &chip->dies[i]; + ret = hccs_get_die_all_link_status(hdev, die, &tmp); + if (ret) { + mutex_unlock(&hdev->lock); + return ret; + } + if (tmp != all_linked) { + all_linked = 0; + break; + } + } + mutex_unlock(&hdev->lock); + + return sysfs_emit(buf, "%u\n", all_linked); +} +static struct kobj_attribute all_linked_on_chip_attr = + __ATTR(all_linked, 0444, all_linked_on_chip_show, NULL); + +static ssize_t linked_full_lane_on_chip_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + const struct hccs_chip_info *chip = kobj_to_chip_info(kobj); + struct hccs_dev *hdev = chip->hdev; + const struct hccs_die_info *die; + u8 full_lane = 1; + u8 i, tmp; + int ret; + + mutex_lock(&hdev->lock); + for (i = 0; i < chip->die_num; i++) { + die = &chip->dies[i]; + ret = hccs_get_die_all_port_lane_status(hdev, die, &tmp); + if (ret) { + mutex_unlock(&hdev->lock); + return ret; + } + if (tmp != full_lane) { + full_lane = 0; + break; + } + } + mutex_unlock(&hdev->lock); + + return sysfs_emit(buf, "%u\n", full_lane); +} +static struct kobj_attribute linked_full_lane_on_chip_attr = + __ATTR(linked_full_lane, 0444, linked_full_lane_on_chip_show, NULL); + +static ssize_t crc_err_cnt_sum_on_chip_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + const struct hccs_chip_info *chip = kobj_to_chip_info(kobj); + u64 crc_err_cnt, total_crc_err_cnt = 0; + struct hccs_dev *hdev = chip->hdev; + const struct hccs_die_info *die; + int ret; + u16 i; + + mutex_lock(&hdev->lock); + for (i = 0; i < chip->die_num; i++) { + die = &chip->dies[i]; + ret = hccs_get_die_total_crc_err_cnt(hdev, die, &crc_err_cnt); + if (ret) { + mutex_unlock(&hdev->lock); + return ret; + } + + total_crc_err_cnt += crc_err_cnt; + } + mutex_unlock(&hdev->lock); + + return sysfs_emit(buf, "%llu\n", total_crc_err_cnt); +} +static struct kobj_attribute crc_err_cnt_sum_on_chip_attr = + __ATTR(crc_err_cnt, 0444, crc_err_cnt_sum_on_chip_show, NULL); + +static struct attribute *hccs_chip_default_attrs[] = { + &all_linked_on_chip_attr.attr, + &linked_full_lane_on_chip_attr.attr, + &crc_err_cnt_sum_on_chip_attr.attr, + NULL, +}; +ATTRIBUTE_GROUPS(hccs_chip_default); + +static const struct kobj_type hccs_chip_type = { + .sysfs_ops = &hccs_comm_ops, + .default_groups = hccs_chip_default_groups, +}; + +static void hccs_remove_die_dir(struct hccs_die_info *die) +{ + struct hccs_port_info *port; + u8 i; + + for (i = 0; i < die->port_num; i++) { + port = &die->ports[i]; + if (port->dir_created) + kobject_put(&port->kobj); + } + + kobject_put(&die->kobj); +} + +static void hccs_remove_chip_dir(struct hccs_chip_info *chip) +{ + struct hccs_die_info *die; + u8 i; + + for (i = 0; i < chip->die_num; i++) { + die = &chip->dies[i]; + if (die->dir_created) + hccs_remove_die_dir(die); + } + + kobject_put(&chip->kobj); +} + +static void hccs_remove_topo_dirs(struct hccs_dev *hdev) +{ + u8 i; + + for (i = 0; i < hdev->chip_num; i++) + hccs_remove_chip_dir(&hdev->chips[i]); +} + +static int hccs_create_hccs_dir(struct hccs_dev *hdev, + struct hccs_die_info *die, + struct hccs_port_info *port) +{ + int ret; + + ret = kobject_init_and_add(&port->kobj, &hccs_port_type, + &die->kobj, "hccs%d", port->port_id); + if (ret) { + kobject_put(&port->kobj); + return ret; + } + + return 0; +} + +static int hccs_create_die_dir(struct hccs_dev *hdev, + struct hccs_chip_info *chip, + struct hccs_die_info *die) +{ + struct hccs_port_info *port; + int ret; + u16 i; + + ret = kobject_init_and_add(&die->kobj, &hccs_die_type, + &chip->kobj, "die%d", die->die_id); + if (ret) { + kobject_put(&die->kobj); + return ret; + } + + for (i = 0; i < die->port_num; i++) { + port = &die->ports[i]; + ret = hccs_create_hccs_dir(hdev, die, port); + if (ret) { + dev_err(hdev->dev, "create hccs%d dir failed.\n", + port->port_id); + goto err; + } + port->dir_created = true; + } + + return 0; +err: + hccs_remove_die_dir(die); + + return ret; +} + +static int hccs_create_chip_dir(struct hccs_dev *hdev, + struct hccs_chip_info *chip) +{ + struct hccs_die_info *die; + int ret; + u16 id; + + ret = kobject_init_and_add(&chip->kobj, &hccs_chip_type, + &hdev->dev->kobj, "chip%d", chip->chip_id); + if (ret) { + kobject_put(&chip->kobj); + return ret; + } + + for (id = 0; id < chip->die_num; id++) { + die = &chip->dies[id]; + ret = hccs_create_die_dir(hdev, chip, die); + if (ret) + goto err; + die->dir_created = true; + } + + return 0; +err: + hccs_remove_chip_dir(chip); + + return ret; +} + +static int hccs_create_topo_dirs(struct hccs_dev *hdev) +{ + struct hccs_chip_info *chip; + u8 id, k; + int ret; + + for (id = 0; id < hdev->chip_num; id++) { + chip = &hdev->chips[id]; + ret = hccs_create_chip_dir(hdev, chip); + if (ret) { + dev_err(hdev->dev, "init chip%d dir failed!\n", id); + goto err; + } + } + + return 0; +err: + for (k = 0; k < id; k++) + hccs_remove_chip_dir(&hdev->chips[k]); + + return ret; +} + +static int hccs_probe(struct platform_device *pdev) +{ + struct acpi_device *acpi_dev; + struct hccs_dev *hdev; + int rc; + + if (acpi_disabled) { + dev_err(&pdev->dev, "acpi is disabled.\n"); + return -ENODEV; + } + acpi_dev = ACPI_COMPANION(&pdev->dev); + if (!acpi_dev) + return -ENODEV; + + hdev = devm_kzalloc(&pdev->dev, sizeof(*hdev), GFP_KERNEL); + if (!hdev) + return -ENOMEM; + hdev->acpi_dev = acpi_dev; + hdev->dev = &pdev->dev; + platform_set_drvdata(pdev, hdev); + + mutex_init(&hdev->lock); + rc = hccs_get_pcc_chan_id(hdev); + if (rc) + return rc; + rc = hccs_register_pcc_channel(hdev); + if (rc) + return rc; + + rc = hccs_get_dev_caps(hdev); + if (rc) + goto unregister_pcc_chan; + + rc = hccs_get_hw_info(hdev); + if (rc) + goto unregister_pcc_chan; + + rc = hccs_create_topo_dirs(hdev); + if (rc) + goto unregister_pcc_chan; + + return 0; + +unregister_pcc_chan: + hccs_unregister_pcc_channel(hdev); + + return rc; +} + +static int hccs_remove(struct platform_device *pdev) +{ + struct hccs_dev *hdev = platform_get_drvdata(pdev); + + hccs_remove_topo_dirs(hdev); + hccs_unregister_pcc_channel(hdev); + + return 0; +} + +static const struct acpi_device_id hccs_acpi_match[] = { + { "HISI04B1"}, + { ""}, +}; +MODULE_DEVICE_TABLE(acpi, hccs_acpi_match); + +static struct platform_driver hccs_driver = { + .probe = hccs_probe, + .remove = hccs_remove, + .driver = { + .name = "kunpeng_hccs", + .acpi_match_table = hccs_acpi_match, + }, +}; + +module_platform_driver(hccs_driver); + +MODULE_DESCRIPTION("Kunpeng SoC HCCS driver"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Huisong Li <lihuisong@huawei.com>"); diff --git a/drivers/soc/hisilicon/kunpeng_hccs.h b/drivers/soc/hisilicon/kunpeng_hccs.h new file mode 100644 index 000000000000..6012d2776028 --- /dev/null +++ b/drivers/soc/hisilicon/kunpeng_hccs.h @@ -0,0 +1,191 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* Copyright (c) 2023 Hisilicon Limited. */ + +#ifndef __KUNPENG_HCCS_H__ +#define __KUNPENG_HCCS_H__ + +/* + * |--------------- Chip0 ---------------|---------------- ChipN -------------| + * |--------Die0-------|--------DieN-------|--------Die0-------|-------DieN-------| + * | P0 | P1 | P2 | P3 | P0 | P1 | P2 | P3 | P0 | P1 | P2 | P3 |P0 | P1 | P2 | P3 | + */ + +/* + * This value cannot be 255, otherwise the loop of the multi-BD communication + * case cannot end. + */ +#define HCCS_DIE_MAX_PORT_ID 254 + +struct hccs_port_info { + u8 port_id; + u8 port_type; + u8 lane_mode; + bool enable; /* if the port is enabled */ + struct kobject kobj; + bool dir_created; + struct hccs_die_info *die; /* point to the die the port is located */ +}; + +struct hccs_die_info { + u8 die_id; + u8 port_num; + u8 min_port_id; + u8 max_port_id; + struct hccs_port_info *ports; + struct kobject kobj; + bool dir_created; + struct hccs_chip_info *chip; /* point to the chip the die is located */ +}; + +struct hccs_chip_info { + u8 chip_id; + u8 die_num; + struct hccs_die_info *dies; + struct kobject kobj; + struct hccs_dev *hdev; +}; + +struct hccs_mbox_client_info { + struct mbox_client client; + struct mbox_chan *mbox_chan; + struct pcc_mbox_chan *pcc_chan; + u64 deadline_us; + void __iomem *pcc_comm_addr; +}; + +struct hccs_dev { + struct device *dev; + struct acpi_device *acpi_dev; + u64 caps; + u8 chip_num; + struct hccs_chip_info *chips; + u8 chan_id; + struct mutex lock; + struct hccs_mbox_client_info cl_info; +}; + +#define HCCS_SERDES_MODULE_CODE 0x32 +enum hccs_subcmd_type { + HCCS_GET_CHIP_NUM = 0x1, + HCCS_GET_DIE_NUM, + HCCS_GET_DIE_INFO, + HCCS_GET_DIE_PORT_INFO, + HCCS_GET_DEV_CAP, + HCCS_GET_PORT_LINK_STATUS, + HCCS_GET_PORT_CRC_ERR_CNT, + HCCS_GET_DIE_PORTS_LANE_STA, + HCCS_GET_DIE_PORTS_LINK_STA, + HCCS_GET_DIE_PORTS_CRC_ERR_CNT, + HCCS_SUB_CMD_MAX = 255, +}; + +struct hccs_die_num_req_param { + u8 chip_id; +}; + +struct hccs_die_info_req_param { + u8 chip_id; + u8 die_idx; +}; + +struct hccs_die_info_rsp_data { + u8 die_id; + u8 port_num; + u8 min_port_id; + u8 max_port_id; +}; + +struct hccs_port_attr { + u8 port_id; + u8 port_type; + u8 lane_mode; + u8 enable : 1; /* if the port is enabled */ + u16 rsv[2]; +}; + +/* + * The common command request for getting the information of all HCCS port on + * specified DIE. + */ +struct hccs_die_comm_req_param { + u8 chip_id; + u8 die_id; /* id in hardware */ +}; + +/* The common command request for getting the information of a specific port */ +struct hccs_port_comm_req_param { + u8 chip_id; + u8 die_id; + u8 port_id; +}; + +#define HCCS_PORT_RESET 1 +#define HCCS_PORT_SETUP 2 +#define HCCS_PORT_CONFIG 3 +#define HCCS_PORT_READY 4 +struct hccs_link_status { + u8 lane_mask; /* indicate which lanes are used. */ + u8 link_fsm : 3; /* link fsm, 1: reset 2: setup 3: config 4: link-up */ + u8 lane_num : 5; /* current lane number */ +}; + +struct hccs_req_head { + u8 module_code; /* set to 0x32 for serdes */ + u8 start_id; + u8 rsv[2]; +}; + +struct hccs_rsp_head { + u8 data_len; + u8 next_id; + u8 rsv[2]; +}; + +struct hccs_fw_inner_head { + u8 retStatus; /* 0: success, other: failure */ + u8 rsv[7]; +}; + +#define HCCS_PCC_SHARE_MEM_BYTES 64 +#define HCCS_FW_INNER_HEAD_BYTES 8 +#define HCCS_RSP_HEAD_BYTES 4 + +#define HCCS_MAX_RSP_DATA_BYTES (HCCS_PCC_SHARE_MEM_BYTES - \ + HCCS_FW_INNER_HEAD_BYTES - \ + HCCS_RSP_HEAD_BYTES) +#define HCCS_MAX_RSP_DATA_SIZE_MAX (HCCS_MAX_RSP_DATA_BYTES / 4) + +/* + * Note: Actual available size of data field also depands on the PCC header + * bytes of the specific type. Driver needs to copy the response data in the + * communication space based on the real length. + */ +struct hccs_rsp_desc { + struct hccs_fw_inner_head fw_inner_head; /* 8 Bytes */ + struct hccs_rsp_head rsp_head; /* 4 Bytes */ + u32 data[HCCS_MAX_RSP_DATA_SIZE_MAX]; +}; + +#define HCCS_REQ_HEAD_BYTES 4 +#define HCCS_MAX_REQ_DATA_BYTES (HCCS_PCC_SHARE_MEM_BYTES - \ + HCCS_REQ_HEAD_BYTES) +#define HCCS_MAX_REQ_DATA_SIZE_MAX (HCCS_MAX_REQ_DATA_BYTES / 4) + +/* + * Note: Actual available size of data field also depands on the PCC header + * bytes of the specific type. Driver needs to copy the request data to the + * communication space based on the real length. + */ +struct hccs_req_desc { + struct hccs_req_head req_head; /* 4 Bytes */ + u32 data[HCCS_MAX_REQ_DATA_SIZE_MAX]; +}; + +struct hccs_desc { + union { + struct hccs_req_desc req; + struct hccs_rsp_desc rsp; + }; +}; + +#endif /* __KUNPENG_HCCS_H__ */ diff --git a/drivers/soc/loongson/Kconfig b/drivers/soc/loongson/Kconfig index 707f56358dc4..314e13bb3e01 100644 --- a/drivers/soc/loongson/Kconfig +++ b/drivers/soc/loongson/Kconfig @@ -16,3 +16,13 @@ config LOONGSON2_GUTS SoCs. Initially only reading SVR and registering soc device are supported. Other guts accesses, such as reading firmware configuration by default, should eventually be added into this driver as well. + +config LOONGSON2_PM + bool "Loongson-2 SoC Power Management Controller Driver" + depends on LOONGARCH && OF + help + The Loongson-2's power management controller was ACPI, supports ACPI + S2Idle (Suspend To Idle), ACPI S3 (Suspend To RAM), ACPI S4 (Suspend To + Disk), ACPI S5 (Soft Shutdown) and supports multiple wake-up methods + (USB, GMAC, PWRBTN, etc.). This driver was to add power management + controller support that base on dts for Loongson-2 series SoCs. diff --git a/drivers/soc/loongson/Makefile b/drivers/soc/loongson/Makefile index 263c486df638..4118f50f55e2 100644 --- a/drivers/soc/loongson/Makefile +++ b/drivers/soc/loongson/Makefile @@ -4,3 +4,4 @@ # obj-$(CONFIG_LOONGSON2_GUTS) += loongson2_guts.o +obj-$(CONFIG_LOONGSON2_PM) += loongson2_pm.o diff --git a/drivers/soc/loongson/loongson2_pm.c b/drivers/soc/loongson/loongson2_pm.c new file mode 100644 index 000000000000..796add6e8b63 --- /dev/null +++ b/drivers/soc/loongson/loongson2_pm.c @@ -0,0 +1,215 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Loongson-2 PM Support + * + * Copyright (C) 2023 Loongson Technology Corporation Limited + */ + +#include <linux/io.h> +#include <linux/of.h> +#include <linux/init.h> +#include <linux/input.h> +#include <linux/suspend.h> +#include <linux/interrupt.h> +#include <linux/pm_wakeirq.h> +#include <linux/platform_device.h> +#include <asm/bootinfo.h> +#include <asm/suspend.h> + +#define LOONGSON2_PM1_CNT_REG 0x14 +#define LOONGSON2_PM1_STS_REG 0x0c +#define LOONGSON2_PM1_ENA_REG 0x10 +#define LOONGSON2_GPE0_STS_REG 0x28 +#define LOONGSON2_GPE0_ENA_REG 0x2c + +#define LOONGSON2_PM1_PWRBTN_STS BIT(8) +#define LOONGSON2_PM1_PCIEXP_WAKE_STS BIT(14) +#define LOONGSON2_PM1_WAKE_STS BIT(15) +#define LOONGSON2_PM1_CNT_INT_EN BIT(0) +#define LOONGSON2_PM1_PWRBTN_EN LOONGSON2_PM1_PWRBTN_STS + +static struct loongson2_pm { + void __iomem *base; + struct input_dev *dev; + bool suspended; +} loongson2_pm; + +#define loongson2_pm_readw(reg) readw(loongson2_pm.base + reg) +#define loongson2_pm_readl(reg) readl(loongson2_pm.base + reg) +#define loongson2_pm_writew(val, reg) writew(val, loongson2_pm.base + reg) +#define loongson2_pm_writel(val, reg) writel(val, loongson2_pm.base + reg) + +static void loongson2_pm_status_clear(void) +{ + u16 value; + + value = loongson2_pm_readw(LOONGSON2_PM1_STS_REG); + value |= (LOONGSON2_PM1_PWRBTN_STS | LOONGSON2_PM1_PCIEXP_WAKE_STS | + LOONGSON2_PM1_WAKE_STS); + loongson2_pm_writew(value, LOONGSON2_PM1_STS_REG); + loongson2_pm_writel(loongson2_pm_readl(LOONGSON2_GPE0_STS_REG), LOONGSON2_GPE0_STS_REG); +} + +static void loongson2_pm_irq_enable(void) +{ + u16 value; + + value = loongson2_pm_readw(LOONGSON2_PM1_CNT_REG); + value |= LOONGSON2_PM1_CNT_INT_EN; + loongson2_pm_writew(value, LOONGSON2_PM1_CNT_REG); + + value = loongson2_pm_readw(LOONGSON2_PM1_ENA_REG); + value |= LOONGSON2_PM1_PWRBTN_EN; + loongson2_pm_writew(value, LOONGSON2_PM1_ENA_REG); +} + +static int loongson2_suspend_enter(suspend_state_t state) +{ + loongson2_pm_status_clear(); + loongarch_common_suspend(); + loongarch_suspend_enter(); + loongarch_common_resume(); + loongson2_pm_irq_enable(); + pm_set_resume_via_firmware(); + + return 0; +} + +static int loongson2_suspend_begin(suspend_state_t state) +{ + pm_set_suspend_via_firmware(); + + return 0; +} + +static int loongson2_suspend_valid_state(suspend_state_t state) +{ + return (state == PM_SUSPEND_MEM); +} + +static const struct platform_suspend_ops loongson2_suspend_ops = { + .valid = loongson2_suspend_valid_state, + .begin = loongson2_suspend_begin, + .enter = loongson2_suspend_enter, +}; + +static int loongson2_power_button_init(struct device *dev, int irq) +{ + int ret; + struct input_dev *button; + + button = input_allocate_device(); + if (!dev) + return -ENOMEM; + + button->name = "Power Button"; + button->phys = "pm/button/input0"; + button->id.bustype = BUS_HOST; + button->dev.parent = NULL; + input_set_capability(button, EV_KEY, KEY_POWER); + + ret = input_register_device(button); + if (ret) + goto free_dev; + + dev_pm_set_wake_irq(&button->dev, irq); + device_set_wakeup_capable(&button->dev, true); + device_set_wakeup_enable(&button->dev, true); + + loongson2_pm.dev = button; + dev_info(dev, "Power Button: Init successful!\n"); + + return 0; + +free_dev: + input_free_device(button); + + return ret; +} + +static irqreturn_t loongson2_pm_irq_handler(int irq, void *dev_id) +{ + u16 status = loongson2_pm_readw(LOONGSON2_PM1_STS_REG); + + if (!loongson2_pm.suspended && (status & LOONGSON2_PM1_PWRBTN_STS)) { + pr_info("Power Button pressed...\n"); + input_report_key(loongson2_pm.dev, KEY_POWER, 1); + input_sync(loongson2_pm.dev); + input_report_key(loongson2_pm.dev, KEY_POWER, 0); + input_sync(loongson2_pm.dev); + } + + loongson2_pm_status_clear(); + + return IRQ_HANDLED; +} + +static int __maybe_unused loongson2_pm_suspend(struct device *dev) +{ + loongson2_pm.suspended = true; + + return 0; +} + +static int __maybe_unused loongson2_pm_resume(struct device *dev) +{ + loongson2_pm.suspended = false; + + return 0; +} +static SIMPLE_DEV_PM_OPS(loongson2_pm_ops, loongson2_pm_suspend, loongson2_pm_resume); + +static int loongson2_pm_probe(struct platform_device *pdev) +{ + int irq, retval; + u64 suspend_addr; + struct device *dev = &pdev->dev; + + loongson2_pm.base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(loongson2_pm.base)) + return PTR_ERR(loongson2_pm.base); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + if (!device_property_read_u64(dev, "loongson,suspend-address", &suspend_addr)) + loongson_sysconf.suspend_addr = (u64)phys_to_virt(suspend_addr); + else + dev_err(dev, "No loongson,suspend-address, could not support S3!\n"); + + if (loongson2_power_button_init(dev, irq)) + return -EINVAL; + + retval = devm_request_irq(&pdev->dev, irq, loongson2_pm_irq_handler, + IRQF_SHARED, "pm_irq", &loongson2_pm); + if (retval) + return retval; + + loongson2_pm_irq_enable(); + loongson2_pm_status_clear(); + + if (loongson_sysconf.suspend_addr) + suspend_set_ops(&loongson2_suspend_ops); + + return 0; +} + +static const struct of_device_id loongson2_pm_match[] = { + { .compatible = "loongson,ls2k0500-pmc", }, + { .compatible = "loongson,ls2k1000-pmc", }, + {}, +}; + +static struct platform_driver loongson2_pm_driver = { + .driver = { + .name = "ls2k-pm", + .pm = &loongson2_pm_ops, + .of_match_table = loongson2_pm_match, + }, + .probe = loongson2_pm_probe, +}; +module_platform_driver(loongson2_pm_driver); + +MODULE_DESCRIPTION("Loongson-2 PM driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index e597799e8121..715348869d04 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -191,6 +191,7 @@ config QCOM_SMD_RPM tristate "Qualcomm Resource Power Manager (RPM) over SMD" depends on ARCH_QCOM || COMPILE_TEST depends on RPMSG + depends on RPMSG_QCOM_SMD || RPMSG_QCOM_SMD=n help If you say yes to this option, support will be included for the Resource Power Manager system found in the Qualcomm 8974 based diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index f548a7150bb2..bbca2e1e55bb 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -17,7 +17,7 @@ obj-$(CONFIG_QCOM_RPM_MASTER_STATS) += rpm_master_stats.o obj-$(CONFIG_QCOM_RPMH) += qcom_rpmh.o qcom_rpmh-y += rpmh-rsc.o qcom_rpmh-y += rpmh.o -obj-$(CONFIG_QCOM_SMD_RPM) += smd-rpm.o +obj-$(CONFIG_QCOM_SMD_RPM) += rpm-proc.o smd-rpm.o obj-$(CONFIG_QCOM_SMEM) += smem.o obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o obj-$(CONFIG_QCOM_SMP2P) += smp2p.o diff --git a/drivers/soc/qcom/cmd-db.c b/drivers/soc/qcom/cmd-db.c index 33856abd560c..34c40368d5b5 100644 --- a/drivers/soc/qcom/cmd-db.c +++ b/drivers/soc/qcom/cmd-db.c @@ -284,7 +284,7 @@ static int cmd_db_debugfs_dump(struct seq_file *seq, void *p) ent = rsc_to_entry_header(rsc); for (j = 0; j < le16_to_cpu(rsc->cnt); j++, ent++) { seq_printf(seq, "0x%05x: %*pEp", le32_to_cpu(ent->addr), - (int)sizeof(ent->id), ent->id); + (int)strnlen(ent->id, sizeof(ent->id)), ent->id); len = le16_to_cpu(ent->len); if (len) { diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c index 40068a285913..adf2d523f103 100644 --- a/drivers/soc/qcom/icc-bwmon.c +++ b/drivers/soc/qcom/icc-bwmon.c @@ -12,7 +12,7 @@ #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> -#include <linux/of_device.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/pm_opp.h> #include <linux/regmap.h> @@ -165,9 +165,6 @@ enum bwmon_fields { struct icc_bwmon_data { unsigned int sample_ms; unsigned int count_unit_kb; /* kbytes */ - unsigned int default_highbw_kbps; - unsigned int default_medbw_kbps; - unsigned int default_lowbw_kbps; u8 zone1_thres_count; u8 zone3_thres_count; unsigned int quirks; @@ -564,20 +561,21 @@ static void bwmon_set_threshold(struct icc_bwmon *bwmon, static void bwmon_start(struct icc_bwmon *bwmon) { const struct icc_bwmon_data *data = bwmon->data; + u32 bw_low = 0; int window; + /* No need to check for errors, as this must have succeeded before. */ + dev_pm_opp_find_bw_ceil(bwmon->dev, &bw_low, 0); + bwmon_clear_counters(bwmon, true); window = mult_frac(bwmon->data->sample_ms, HW_TIMER_HZ, MSEC_PER_SEC); /* Maximum sampling window: 0xffffff for v4 and 0xfffff for v5 */ regmap_field_write(bwmon->regs[F_SAMPLE_WINDOW], window); - bwmon_set_threshold(bwmon, bwmon->regs[F_THRESHOLD_HIGH], - data->default_highbw_kbps); - bwmon_set_threshold(bwmon, bwmon->regs[F_THRESHOLD_MED], - data->default_medbw_kbps); - bwmon_set_threshold(bwmon, bwmon->regs[F_THRESHOLD_LOW], - data->default_lowbw_kbps); + bwmon_set_threshold(bwmon, bwmon->regs[F_THRESHOLD_HIGH], bw_low); + bwmon_set_threshold(bwmon, bwmon->regs[F_THRESHOLD_MED], bw_low); + bwmon_set_threshold(bwmon, bwmon->regs[F_THRESHOLD_LOW], 0); regmap_field_write(bwmon->regs[F_THRESHOLD_COUNT_ZONE0], BWMON_THRESHOLD_COUNT_ZONE0_DEFAULT); @@ -807,9 +805,6 @@ static int bwmon_remove(struct platform_device *pdev) static const struct icc_bwmon_data msm8998_bwmon_data = { .sample_ms = 4, .count_unit_kb = 1024, - .default_highbw_kbps = 4800 * 1024, /* 4.8 GBps */ - .default_medbw_kbps = 512 * 1024, /* 512 MBps */ - .default_lowbw_kbps = 0, .zone1_thres_count = 16, .zone3_thres_count = 1, .quirks = BWMON_HAS_GLOBAL_IRQ, @@ -822,9 +817,6 @@ static const struct icc_bwmon_data msm8998_bwmon_data = { static const struct icc_bwmon_data sdm845_cpu_bwmon_data = { .sample_ms = 4, .count_unit_kb = 64, - .default_highbw_kbps = 4800 * 1024, /* 4.8 GBps */ - .default_medbw_kbps = 512 * 1024, /* 512 MBps */ - .default_lowbw_kbps = 0, .zone1_thres_count = 16, .zone3_thres_count = 1, .quirks = BWMON_HAS_GLOBAL_IRQ, @@ -835,9 +827,6 @@ static const struct icc_bwmon_data sdm845_cpu_bwmon_data = { static const struct icc_bwmon_data sdm845_llcc_bwmon_data = { .sample_ms = 4, .count_unit_kb = 1024, - .default_highbw_kbps = 800 * 1024, /* 800 MBps */ - .default_medbw_kbps = 256 * 1024, /* 256 MBps */ - .default_lowbw_kbps = 0, .zone1_thres_count = 16, .zone3_thres_count = 1, .regmap_fields = sdm845_llcc_bwmon_reg_fields, @@ -847,9 +836,6 @@ static const struct icc_bwmon_data sdm845_llcc_bwmon_data = { static const struct icc_bwmon_data sc7280_llcc_bwmon_data = { .sample_ms = 4, .count_unit_kb = 64, - .default_highbw_kbps = 800 * 1024, /* 800 MBps */ - .default_medbw_kbps = 256 * 1024, /* 256 MBps */ - .default_lowbw_kbps = 0, .zone1_thres_count = 16, .zone3_thres_count = 1, .quirks = BWMON_NEEDS_FORCE_CLEAR, diff --git a/drivers/soc/qcom/ice.c b/drivers/soc/qcom/ice.c index a6123ea96272..fbab7fe5c652 100644 --- a/drivers/soc/qcom/ice.c +++ b/drivers/soc/qcom/ice.c @@ -11,7 +11,9 @@ #include <linux/clk.h> #include <linux/delay.h> #include <linux/iopoll.h> +#include <linux/of.h> #include <linux/of_platform.h> +#include <linux/platform_device.h> #include <linux/firmware/qcom/qcom_scm.h> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 67c19ed2219a..e32a4161a8d0 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -13,7 +13,6 @@ #include <linux/module.h> #include <linux/mutex.h> #include <linux/of.h> -#include <linux/of_device.h> #include <linux/regmap.h> #include <linux/sizes.h> #include <linux/slab.h> diff --git a/drivers/soc/qcom/ocmem.c b/drivers/soc/qcom/ocmem.c index aaddc3cc53b7..20f5461d46b9 100644 --- a/drivers/soc/qcom/ocmem.c +++ b/drivers/soc/qcom/ocmem.c @@ -14,7 +14,8 @@ #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> -#include <linux/of_device.h> +#include <linux/of.h> +#include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/firmware/qcom/qcom_scm.h> #include <linux/sizes.h> @@ -54,6 +55,8 @@ struct ocmem { const struct ocmem_config *config; struct resource *memory; void __iomem *mmio; + struct clk *core_clk; + struct clk *iface_clk; unsigned int num_ports; unsigned int num_macros; bool interleaved; @@ -80,8 +83,8 @@ struct ocmem { #define OCMEM_HW_VERSION_MINOR(val) FIELD_GET(GENMASK(27, 16), val) #define OCMEM_HW_VERSION_STEP(val) FIELD_GET(GENMASK(15, 0), val) -#define OCMEM_HW_PROFILE_NUM_PORTS(val) FIELD_PREP(0x0000000f, (val)) -#define OCMEM_HW_PROFILE_NUM_MACROS(val) FIELD_PREP(0x00003f00, (val)) +#define OCMEM_HW_PROFILE_NUM_PORTS(val) FIELD_GET(0x0000000f, (val)) +#define OCMEM_HW_PROFILE_NUM_MACROS(val) FIELD_GET(0x00003f00, (val)) #define OCMEM_HW_PROFILE_LAST_REGN_HALFSIZE 0x00010000 #define OCMEM_HW_PROFILE_INTERLEAVING 0x00020000 @@ -95,16 +98,6 @@ struct ocmem { #define OCMEM_PSGSC_CTL_MACRO2_MODE(val) FIELD_PREP(0x00000700, (val)) #define OCMEM_PSGSC_CTL_MACRO3_MODE(val) FIELD_PREP(0x00007000, (val)) -#define OCMEM_CLK_CORE_IDX 0 -static struct clk_bulk_data ocmem_clks[] = { - { - .id = "core", - }, - { - .id = "iface", - }, -}; - static inline void ocmem_write(struct ocmem *ocmem, u32 reg, u32 data) { writel(data, ocmem->mmio + reg); @@ -320,19 +313,20 @@ static int ocmem_dev_probe(struct platform_device *pdev) ocmem->dev = dev; ocmem->config = device_get_match_data(dev); - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(ocmem_clks), ocmem_clks); - if (ret) { - if (ret != -EPROBE_DEFER) - dev_err(dev, "Unable to get clocks\n"); + ocmem->core_clk = devm_clk_get(dev, "core"); + if (IS_ERR(ocmem->core_clk)) + return dev_err_probe(dev, PTR_ERR(ocmem->core_clk), + "Unable to get core clock\n"); - return ret; - } + ocmem->iface_clk = devm_clk_get_optional(dev, "iface"); + if (IS_ERR(ocmem->iface_clk)) + return dev_err_probe(dev, PTR_ERR(ocmem->iface_clk), + "Unable to get iface clock\n"); ocmem->mmio = devm_platform_ioremap_resource_byname(pdev, "ctrl"); - if (IS_ERR(ocmem->mmio)) { - dev_err(&pdev->dev, "Failed to ioremap ocmem_ctrl resource\n"); - return PTR_ERR(ocmem->mmio); - } + if (IS_ERR(ocmem->mmio)) + return dev_err_probe(&pdev->dev, PTR_ERR(ocmem->mmio), + "Failed to ioremap ocmem_ctrl resource\n"); ocmem->memory = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem"); @@ -342,19 +336,23 @@ static int ocmem_dev_probe(struct platform_device *pdev) } /* The core clock is synchronous with graphics */ - WARN_ON(clk_set_rate(ocmem_clks[OCMEM_CLK_CORE_IDX].clk, 1000) < 0); + WARN_ON(clk_set_rate(ocmem->core_clk, 1000) < 0); + + ret = clk_prepare_enable(ocmem->core_clk); + if (ret) + return dev_err_probe(ocmem->dev, ret, "Failed to enable core clock\n"); - ret = clk_bulk_prepare_enable(ARRAY_SIZE(ocmem_clks), ocmem_clks); + ret = clk_prepare_enable(ocmem->iface_clk); if (ret) { - dev_info(ocmem->dev, "Failed to enable clocks\n"); - return ret; + clk_disable_unprepare(ocmem->core_clk); + return dev_err_probe(ocmem->dev, ret, "Failed to enable iface clock\n"); } if (qcom_scm_restore_sec_cfg_available()) { dev_dbg(dev, "configuring scm\n"); ret = qcom_scm_restore_sec_cfg(QCOM_SCM_OCMEM_DEV_ID, 0); if (ret) { - dev_err(dev, "Could not enable secure configuration\n"); + dev_err_probe(dev, ret, "Could not enable secure configuration\n"); goto err_clk_disable; } } @@ -413,23 +411,33 @@ static int ocmem_dev_probe(struct platform_device *pdev) return 0; err_clk_disable: - clk_bulk_disable_unprepare(ARRAY_SIZE(ocmem_clks), ocmem_clks); + clk_disable_unprepare(ocmem->core_clk); + clk_disable_unprepare(ocmem->iface_clk); return ret; } static int ocmem_dev_remove(struct platform_device *pdev) { - clk_bulk_disable_unprepare(ARRAY_SIZE(ocmem_clks), ocmem_clks); + struct ocmem *ocmem = platform_get_drvdata(pdev); + + clk_disable_unprepare(ocmem->core_clk); + clk_disable_unprepare(ocmem->iface_clk); return 0; } +static const struct ocmem_config ocmem_8226_config = { + .num_regions = 1, + .macro_size = SZ_128K, +}; + static const struct ocmem_config ocmem_8974_config = { .num_regions = 3, .macro_size = SZ_128K, }; static const struct of_device_id ocmem_of_match[] = { + { .compatible = "qcom,msm8226-ocmem", .data = &ocmem_8226_config }, { .compatible = "qcom,msm8974-ocmem", .data = &ocmem_8974_config }, { } }; diff --git a/drivers/soc/qcom/pmic_glink.c b/drivers/soc/qcom/pmic_glink.c index c87056769ebd..61c89ddfc75b 100644 --- a/drivers/soc/qcom/pmic_glink.c +++ b/drivers/soc/qcom/pmic_glink.c @@ -4,8 +4,8 @@ * Copyright (c) 2022, Linaro Ltd */ #include <linux/auxiliary_bus.h> -#include <linux/of_device.h> #include <linux/module.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/rpmsg.h> #include <linux/slab.h> @@ -342,13 +342,9 @@ static const unsigned long pmic_glink_sm8450_client_mask = BIT(PMIC_GLINK_CLIENT BIT(PMIC_GLINK_CLIENT_ALTMODE) | BIT(PMIC_GLINK_CLIENT_UCSI); -/* Do not handle altmode for now on those platforms */ -static const unsigned long pmic_glink_sm8550_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) | - BIT(PMIC_GLINK_CLIENT_UCSI); - static const struct of_device_id pmic_glink_of_match[] = { { .compatible = "qcom,sm8450-pmic-glink", .data = &pmic_glink_sm8450_client_mask }, - { .compatible = "qcom,sm8550-pmic-glink", .data = &pmic_glink_sm8550_client_mask }, + { .compatible = "qcom,sm8550-pmic-glink", .data = &pmic_glink_sm8450_client_mask }, { .compatible = "qcom,pmic-glink" }, {} }; diff --git a/drivers/soc/qcom/pmic_glink_altmode.c b/drivers/soc/qcom/pmic_glink_altmode.c index df48fbea4b68..d05e0d6edf49 100644 --- a/drivers/soc/qcom/pmic_glink_altmode.c +++ b/drivers/soc/qcom/pmic_glink_altmode.c @@ -6,6 +6,7 @@ #include <linux/auxiliary_bus.h> #include <linux/bitfield.h> #include <linux/module.h> +#include <linux/of.h> #include <linux/of_device.h> #include <linux/mutex.h> #include <linux/property.h> @@ -15,6 +16,7 @@ #include <linux/usb/typec_altmode.h> #include <linux/usb/typec_dp.h> #include <linux/usb/typec_mux.h> +#include <linux/usb/typec_retimer.h> #include <linux/soc/qcom/pmic_glink.h> @@ -68,6 +70,8 @@ struct pmic_glink_altmode_port { struct typec_switch *typec_switch; struct typec_mux *typec_mux; struct typec_mux_state state; + struct typec_retimer *typec_retimer; + struct typec_retimer_state retimer_state; struct typec_altmode dp_alt; struct work_struct work; @@ -157,6 +161,14 @@ static void pmic_glink_altmode_enable_dp(struct pmic_glink_altmode *altmode, ret = typec_mux_set(port->typec_mux, &port->state); if (ret) dev_err(altmode->dev, "failed to switch mux to DP\n"); + + port->retimer_state.alt = &port->dp_alt; + port->retimer_state.data = &dp_data; + port->retimer_state.mode = TYPEC_MODAL_STATE(mode); + + ret = typec_retimer_set(port->typec_retimer, &port->retimer_state); + if (ret) + dev_err(altmode->dev, "failed to setup retimer to DP\n"); } static void pmic_glink_altmode_enable_usb(struct pmic_glink_altmode *altmode, @@ -171,6 +183,36 @@ static void pmic_glink_altmode_enable_usb(struct pmic_glink_altmode *altmode, ret = typec_mux_set(port->typec_mux, &port->state); if (ret) dev_err(altmode->dev, "failed to switch mux to USB\n"); + + port->retimer_state.alt = NULL; + port->retimer_state.data = NULL; + port->retimer_state.mode = TYPEC_STATE_USB; + + ret = typec_retimer_set(port->typec_retimer, &port->retimer_state); + if (ret) + dev_err(altmode->dev, "failed to setup retimer to USB\n"); +} + +static void pmic_glink_altmode_safe(struct pmic_glink_altmode *altmode, + struct pmic_glink_altmode_port *port) +{ + int ret; + + port->state.alt = NULL; + port->state.data = NULL; + port->state.mode = TYPEC_STATE_SAFE; + + ret = typec_mux_set(port->typec_mux, &port->state); + if (ret) + dev_err(altmode->dev, "failed to switch mux to safe mode\n"); + + port->retimer_state.alt = NULL; + port->retimer_state.data = NULL; + port->retimer_state.mode = TYPEC_STATE_SAFE; + + ret = typec_retimer_set(port->typec_retimer, &port->retimer_state); + if (ret) + dev_err(altmode->dev, "failed to setup retimer to USB\n"); } static void pmic_glink_altmode_worker(struct work_struct *work) @@ -180,7 +222,9 @@ static void pmic_glink_altmode_worker(struct work_struct *work) typec_switch_set(alt_port->typec_switch, alt_port->orientation); - if (alt_port->svid == USB_TYPEC_DP_SID) + if (alt_port->svid == USB_TYPEC_DP_SID && alt_port->mode == 0xff) + pmic_glink_altmode_safe(altmode, alt_port); + else if (alt_port->svid == USB_TYPEC_DP_SID) pmic_glink_altmode_enable_dp(altmode, alt_port, alt_port->mode, alt_port->hpd_state, alt_port->hpd_irq); else @@ -331,6 +375,11 @@ static const struct drm_bridge_funcs pmic_glink_altmode_bridge_funcs = { .attach = pmic_glink_altmode_attach, }; +static void pmic_glink_altmode_put_retimer(void *data) +{ + typec_retimer_put(data); +} + static void pmic_glink_altmode_put_mux(void *data) { typec_mux_put(data); @@ -437,6 +486,17 @@ static int pmic_glink_altmode_probe(struct auxiliary_device *adev, if (ret) return ret; + alt_port->typec_retimer = fwnode_typec_retimer_get(fwnode); + if (IS_ERR(alt_port->typec_retimer)) + return dev_err_probe(dev, PTR_ERR(alt_port->typec_retimer), + "failed to acquire retimer-switch for port: %d\n", + port); + + ret = devm_add_action_or_reset(dev, pmic_glink_altmode_put_retimer, + alt_port->typec_retimer); + if (ret) + return ret; + alt_port->typec_switch = fwnode_typec_switch_get(fwnode); if (IS_ERR(alt_port->typec_switch)) return dev_err_probe(dev, PTR_ERR(alt_port->typec_switch), diff --git a/drivers/soc/qcom/qcom_aoss.c b/drivers/soc/qcom/qcom_aoss.c index e376c32cc16e..77f0cf126629 100644 --- a/drivers/soc/qcom/qcom_aoss.c +++ b/drivers/soc/qcom/qcom_aoss.c @@ -205,37 +205,42 @@ static bool qmp_message_empty(struct qmp *qmp) /** * qmp_send() - send a message to the AOSS * @qmp: qmp context - * @data: message to be sent - * @len: length of the message + * @fmt: format string for message to be sent + * @...: arguments for the format string * - * Transmit @data to AOSS and wait for the AOSS to acknowledge the message. - * @len must be a multiple of 4 and not longer than the mailbox size. Access is - * synchronized by this implementation. + * Transmit message to AOSS and wait for the AOSS to acknowledge the message. + * data must not be longer than the mailbox size. Access is synchronized by + * this implementation. * * Return: 0 on success, negative errno on failure */ -int qmp_send(struct qmp *qmp, const void *data, size_t len) +int qmp_send(struct qmp *qmp, const char *fmt, ...) { + char buf[QMP_MSG_LEN]; long time_left; + va_list args; + int len; int ret; - if (WARN_ON(IS_ERR_OR_NULL(qmp) || !data)) + if (WARN_ON(IS_ERR_OR_NULL(qmp) || !fmt)) return -EINVAL; - if (WARN_ON(len + sizeof(u32) > qmp->size)) - return -EINVAL; + memset(buf, 0, sizeof(buf)); + va_start(args, fmt); + len = vsnprintf(buf, sizeof(buf), fmt, args); + va_end(args); - if (WARN_ON(len % sizeof(u32))) + if (WARN_ON(len >= sizeof(buf))) return -EINVAL; mutex_lock(&qmp->tx_lock); /* The message RAM only implements 32-bit accesses */ __iowrite32_copy(qmp->msgram + qmp->offset + sizeof(u32), - data, len / sizeof(u32)); - writel(len, qmp->msgram + qmp->offset); + buf, sizeof(buf) / sizeof(u32)); + writel(sizeof(buf), qmp->msgram + qmp->offset); - /* Read back len to confirm data written in message RAM */ + /* Read back length to confirm data written in message RAM */ readl(qmp->msgram + qmp->offset); qmp_kick(qmp); @@ -259,18 +264,18 @@ EXPORT_SYMBOL(qmp_send); static int qmp_qdss_clk_prepare(struct clk_hw *hw) { - static const char buf[QMP_MSG_LEN] = "{class: clock, res: qdss, val: 1}"; + static const char *buf = "{class: clock, res: qdss, val: 1}"; struct qmp *qmp = container_of(hw, struct qmp, qdss_clk); - return qmp_send(qmp, buf, sizeof(buf)); + return qmp_send(qmp, buf); } static void qmp_qdss_clk_unprepare(struct clk_hw *hw) { - static const char buf[QMP_MSG_LEN] = "{class: clock, res: qdss, val: 0}"; + static const char *buf = "{class: clock, res: qdss, val: 0}"; struct qmp *qmp = container_of(hw, struct qmp, qdss_clk); - qmp_send(qmp, buf, sizeof(buf)); + qmp_send(qmp, buf); } static const struct clk_ops qmp_qdss_clk_ops = { @@ -329,7 +334,6 @@ static int qmp_cdev_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state) { struct qmp_cooling_device *qmp_cdev = cdev->devdata; - char buf[QMP_MSG_LEN] = {}; bool cdev_state; int ret; @@ -339,13 +343,8 @@ static int qmp_cdev_set_cur_state(struct thermal_cooling_device *cdev, if (qmp_cdev->state == state) return 0; - snprintf(buf, sizeof(buf), - "{class: volt_flr, event:zero_temp, res:%s, value:%s}", - qmp_cdev->name, - cdev_state ? "on" : "off"); - - ret = qmp_send(qmp_cdev->qmp, buf, sizeof(buf)); - + ret = qmp_send(qmp_cdev->qmp, "{class: volt_flr, event:zero_temp, res:%s, value:%s}", + qmp_cdev->name, cdev_state ? "on" : "off"); if (!ret) qmp_cdev->state = cdev_state; diff --git a/drivers/soc/qcom/qcom_gsbi.c b/drivers/soc/qcom/qcom_gsbi.c index f1742e5bddb9..df7907a83aa8 100644 --- a/drivers/soc/qcom/qcom_gsbi.c +++ b/drivers/soc/qcom/qcom_gsbi.c @@ -129,7 +129,7 @@ static int gsbi_probe(struct platform_device *pdev) const struct of_device_id *match; void __iomem *base; struct gsbi_info *gsbi; - int i, ret; + int i; u32 mask, gsbi_num; const struct crci_config *config = NULL; @@ -178,12 +178,10 @@ static int gsbi_probe(struct platform_device *pdev) dev_info(&pdev->dev, "GSBI port protocol: %d crci: %d\n", gsbi->mode, gsbi->crci); - gsbi->hclk = devm_clk_get(&pdev->dev, "iface"); + gsbi->hclk = devm_clk_get_enabled(&pdev->dev, "iface"); if (IS_ERR(gsbi->hclk)) return PTR_ERR(gsbi->hclk); - clk_prepare_enable(gsbi->hclk); - writel_relaxed((gsbi->mode << GSBI_PROTOCOL_SHIFT) | gsbi->crci, base + GSBI_CTRL_REG); @@ -211,10 +209,7 @@ static int gsbi_probe(struct platform_device *pdev) platform_set_drvdata(pdev, gsbi); - ret = of_platform_populate(node, NULL, NULL, &pdev->dev); - if (ret) - clk_disable_unprepare(gsbi->hclk); - return ret; + return of_platform_populate(node, NULL, NULL, &pdev->dev); } static int gsbi_remove(struct platform_device *pdev) diff --git a/drivers/soc/qcom/qmi_encdec.c b/drivers/soc/qcom/qmi_encdec.c index b7158e3c3a0b..5c7161b18b72 100644 --- a/drivers/soc/qcom/qmi_encdec.c +++ b/drivers/soc/qcom/qmi_encdec.c @@ -534,8 +534,8 @@ static int qmi_decode_string_elem(const struct qmi_elem_info *ei_array, decoded_bytes += rc; } - if (string_len > temp_ei->elem_len) { - pr_err("%s: String len %d > Max Len %d\n", + if (string_len >= temp_ei->elem_len) { + pr_err("%s: String len %d >= Max Len %d\n", __func__, string_len, temp_ei->elem_len); return -ETOOSMALL; } else if (string_len > tlv_len) { diff --git a/drivers/soc/qcom/rpm-proc.c b/drivers/soc/qcom/rpm-proc.c new file mode 100644 index 000000000000..2995d9b90190 --- /dev/null +++ b/drivers/soc/qcom/rpm-proc.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net> */ + +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> +#include <linux/rpmsg/qcom_smd.h> + +static int rpm_proc_probe(struct platform_device *pdev) +{ + struct qcom_smd_edge *edge = NULL; + struct device *dev = &pdev->dev; + struct device_node *edge_node; + int ret; + + edge_node = of_get_child_by_name(dev->of_node, "smd-edge"); + if (edge_node) { + edge = qcom_smd_register_edge(dev, edge_node); + of_node_put(edge_node); + if (IS_ERR(edge)) + return dev_err_probe(dev, PTR_ERR(edge), + "Failed to register smd-edge\n"); + } + + ret = devm_of_platform_populate(dev); + if (ret) { + dev_err(dev, "Failed to populate child devices: %d\n", ret); + goto err; + } + + platform_set_drvdata(pdev, edge); + return 0; +err: + if (edge) + qcom_smd_unregister_edge(edge); + return ret; +} + +static void rpm_proc_remove(struct platform_device *pdev) +{ + struct qcom_smd_edge *edge = platform_get_drvdata(pdev); + + if (edge) + qcom_smd_unregister_edge(edge); +} + +static const struct of_device_id rpm_proc_of_match[] = { + { .compatible = "qcom,rpm-proc", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, rpm_proc_of_match); + +static struct platform_driver rpm_proc_driver = { + .probe = rpm_proc_probe, + .remove_new = rpm_proc_remove, + .driver = { + .name = "qcom-rpm-proc", + .of_match_table = rpm_proc_of_match, + }, +}; + +static int __init rpm_proc_init(void) +{ + return platform_driver_register(&rpm_proc_driver); +} +arch_initcall(rpm_proc_init); + +static void __exit rpm_proc_exit(void) +{ + platform_driver_unregister(&rpm_proc_driver); +} +module_exit(rpm_proc_exit); + +MODULE_DESCRIPTION("Qualcomm RPM processor/subsystem driver"); +MODULE_AUTHOR("Stephan Gerhold <stephan@gerhold.net>"); +MODULE_LICENSE("GPL"); diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c index 0dd4363ebac8..a021dc71807b 100644 --- a/drivers/soc/qcom/rpmh-rsc.c +++ b/drivers/soc/qcom/rpmh-rsc.c @@ -516,7 +516,7 @@ static void __tcs_buffer_write(struct rsc_drv *drv, int tcs_id, int cmd_id, write_tcs_cmd(drv, drv->regs[RSC_DRV_CMD_MSGID], tcs_id, j, msgid); write_tcs_cmd(drv, drv->regs[RSC_DRV_CMD_ADDR], tcs_id, j, cmd->addr); write_tcs_cmd(drv, drv->regs[RSC_DRV_CMD_DATA], tcs_id, j, cmd->data); - trace_rpmh_send_msg(drv, tcs_id, j, msgid, cmd); + trace_rpmh_send_msg(drv, tcs_id, msg->state, j, msgid, cmd); } cmd_enable |= read_tcs_reg(drv, drv->regs[RSC_DRV_CMD_ENABLE], tcs_id); diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c index 0c1aa809cc4e..13d8c52330d0 100644 --- a/drivers/soc/qcom/smd-rpm.c +++ b/drivers/soc/qcom/smd-rpm.c @@ -199,6 +199,9 @@ static int qcom_smd_rpm_probe(struct rpmsg_device *rpdev) struct qcom_smd_rpm *rpm; int ret; + if (!rpdev->dev.of_node) + return -EINVAL; + rpm = devm_kzalloc(&rpdev->dev, sizeof(*rpm), GFP_KERNEL); if (!rpm) return -ENOMEM; @@ -230,38 +233,18 @@ static void qcom_smd_rpm_remove(struct rpmsg_device *rpdev) of_platform_depopulate(&rpdev->dev); } -static const struct of_device_id qcom_smd_rpm_of_match[] = { - { .compatible = "qcom,rpm-apq8084" }, - { .compatible = "qcom,rpm-ipq6018" }, - { .compatible = "qcom,rpm-ipq9574" }, - { .compatible = "qcom,rpm-msm8226" }, - { .compatible = "qcom,rpm-msm8909" }, - { .compatible = "qcom,rpm-msm8916" }, - { .compatible = "qcom,rpm-msm8936" }, - { .compatible = "qcom,rpm-msm8953" }, - { .compatible = "qcom,rpm-msm8974" }, - { .compatible = "qcom,rpm-msm8976" }, - { .compatible = "qcom,rpm-msm8994" }, - { .compatible = "qcom,rpm-msm8996" }, - { .compatible = "qcom,rpm-msm8998" }, - { .compatible = "qcom,rpm-sdm660" }, - { .compatible = "qcom,rpm-sm6115" }, - { .compatible = "qcom,rpm-sm6125" }, - { .compatible = "qcom,rpm-sm6375" }, - { .compatible = "qcom,rpm-qcm2290" }, - { .compatible = "qcom,rpm-qcs404" }, - {} +static const struct rpmsg_device_id qcom_smd_rpm_id_table[] = { + { .name = "rpm_requests", }, + { /* sentinel */ } }; -MODULE_DEVICE_TABLE(of, qcom_smd_rpm_of_match); +MODULE_DEVICE_TABLE(rpmsg, qcom_smd_rpm_id_table); static struct rpmsg_driver qcom_smd_rpm_driver = { .probe = qcom_smd_rpm_probe, .remove = qcom_smd_rpm_remove, .callback = qcom_smd_rpm_callback, - .drv = { - .name = "qcom_smd_rpm", - .of_match_table = qcom_smd_rpm_of_match, - }, + .id_table = qcom_smd_rpm_id_table, + .drv.name = "qcom_smd_rpm", }; static int __init qcom_smd_rpm_init(void) diff --git a/drivers/soc/qcom/smem.c b/drivers/soc/qcom/smem.c index b0d59e815c3b..d4a89d2bb43b 100644 --- a/drivers/soc/qcom/smem.c +++ b/drivers/soc/qcom/smem.c @@ -359,6 +359,17 @@ static struct qcom_smem *__smem; /* Timeout (ms) for the trylock of remote spinlocks */ #define HWSPINLOCK_TIMEOUT 1000 +/** + * qcom_smem_is_available() - Check if SMEM is available + * + * Return: true if SMEM is available, false otherwise. + */ +bool qcom_smem_is_available(void) +{ + return !!__smem; +} +EXPORT_SYMBOL(qcom_smem_is_available); + static int qcom_smem_alloc_private(struct qcom_smem *smem, struct smem_partition *part, unsigned item, @@ -724,7 +735,7 @@ EXPORT_SYMBOL_GPL(qcom_smem_get_free_space); static bool addr_in_range(void __iomem *base, size_t size, void *addr) { - return base && (addr >= base && addr < base + size); + return base && ((void __iomem *)addr >= base && (void __iomem *)addr < base + size); } /** @@ -1059,7 +1070,6 @@ static int qcom_smem_probe(struct platform_device *pdev) struct reserved_mem *rmem; struct qcom_smem *smem; unsigned long flags; - size_t array_size; int num_regions; int hwlock_id; u32 version; @@ -1071,8 +1081,8 @@ static int qcom_smem_probe(struct platform_device *pdev) if (of_property_present(pdev->dev.of_node, "qcom,rpm-msg-ram")) num_regions++; - array_size = num_regions * sizeof(struct smem_region); - smem = devm_kzalloc(&pdev->dev, sizeof(*smem) + array_size, GFP_KERNEL); + smem = devm_kzalloc(&pdev->dev, struct_size(smem, regions, num_regions), + GFP_KERNEL); if (!smem) return -ENOMEM; diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c index 4d49945b3a35..497cfb720fcb 100644 --- a/drivers/soc/qcom/socinfo.c +++ b/drivers/soc/qcom/socinfo.c @@ -371,6 +371,7 @@ static const struct soc_id soc_id[] = { { qcom_board_id(SDA429W) }, { qcom_board_id(SM8350) }, { qcom_board_id(QCM2290) }, + { qcom_board_id(SM7125) }, { qcom_board_id(SM6115) }, { qcom_board_id(IPQ5010) }, { qcom_board_id(IPQ5018) }, @@ -405,8 +406,8 @@ static const struct soc_id soc_id[] = { { qcom_board_id(SA8775P) }, { qcom_board_id(QRU1000) }, { qcom_board_id(QDU1000) }, + { qcom_board_id(SM4450) }, { qcom_board_id(QDU1010) }, - { qcom_board_id(IPQ5019) }, { qcom_board_id(QRU1032) }, { qcom_board_id(QRU1052) }, { qcom_board_id(QRU1062) }, diff --git a/drivers/soc/qcom/spm.c b/drivers/soc/qcom/spm.c index a6cbeb40831b..2f0b1bfe7658 100644 --- a/drivers/soc/qcom/spm.c +++ b/drivers/soc/qcom/spm.c @@ -12,8 +12,6 @@ #include <linux/module.h> #include <linux/slab.h> #include <linux/of.h> -#include <linux/of_address.h> -#include <linux/of_device.h> #include <linux/err.h> #include <linux/platform_device.h> #include <soc/qcom/spm.h> @@ -275,15 +273,13 @@ static int spm_dev_probe(struct platform_device *pdev) { const struct of_device_id *match_id; struct spm_driver_data *drv; - struct resource *res; void __iomem *addr; drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL); if (!drv) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - drv->reg_base = devm_ioremap_resource(&pdev->dev, res); + drv->reg_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(drv->reg_base)) return PTR_ERR(drv->reg_base); diff --git a/drivers/soc/qcom/trace-rpmh.h b/drivers/soc/qcom/trace-rpmh.h index 12b676b20cb2..be6b42ecc1f8 100644 --- a/drivers/soc/qcom/trace-rpmh.h +++ b/drivers/soc/qcom/trace-rpmh.h @@ -38,14 +38,15 @@ TRACE_EVENT(rpmh_tx_done, TRACE_EVENT(rpmh_send_msg, - TP_PROTO(struct rsc_drv *d, int m, int n, u32 h, + TP_PROTO(struct rsc_drv *d, int m, enum rpmh_state state, int n, u32 h, const struct tcs_cmd *c), - TP_ARGS(d, m, n, h, c), + TP_ARGS(d, m, state, n, h, c), TP_STRUCT__entry( __string(name, d->name) __field(int, m) + __field(u32, state) __field(int, n) __field(u32, hdr) __field(u32, addr) @@ -56,6 +57,7 @@ TRACE_EVENT(rpmh_send_msg, TP_fast_assign( __assign_str(name, d->name); __entry->m = m; + __entry->state = state; __entry->n = n; __entry->hdr = h; __entry->addr = c->addr; @@ -63,8 +65,14 @@ TRACE_EVENT(rpmh_send_msg, __entry->wait = c->wait; ), - TP_printk("%s: send-msg: tcs(m): %d cmd(n): %d msgid: %#x addr: %#x data: %#x complete: %d", - __get_str(name), __entry->m, __entry->n, __entry->hdr, + TP_printk("%s: tcs(m): %d [%s] cmd(n): %d msgid: %#x addr: %#x data: %#x complete: %d", + __get_str(name), __entry->m, + __print_symbolic(__entry->state, + { RPMH_SLEEP_STATE, "sleep" }, + { RPMH_WAKE_ONLY_STATE, "wake" }, + { RPMH_ACTIVE_ONLY_STATE, "active" }), + __entry->n, + __entry->hdr, __entry->addr, __entry->data, __entry->wait) ); diff --git a/drivers/soc/qcom/wcnss_ctrl.c b/drivers/soc/qcom/wcnss_ctrl.c index 2a06d631e415..ad9942412c58 100644 --- a/drivers/soc/qcom/wcnss_ctrl.c +++ b/drivers/soc/qcom/wcnss_ctrl.c @@ -7,6 +7,7 @@ #include <linux/module.h> #include <linux/slab.h> #include <linux/io.h> +#include <linux/of.h> #include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/rpmsg.h> diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c index 15a3970e3509..d768c5a70174 100644 --- a/drivers/soc/rockchip/grf.c +++ b/drivers/soc/rockchip/grf.c @@ -121,6 +121,17 @@ static const struct rockchip_grf_info rk3566_pipegrf __initconst = { .num_values = ARRAY_SIZE(rk3566_defaults), }; +#define RK3588_GRF_SOC_CON6 0x0318 + +static const struct rockchip_grf_value rk3588_defaults[] __initconst = { + { "jtag switching", RK3588_GRF_SOC_CON6, HIWORD_UPDATE(0, 1, 14) }, +}; + +static const struct rockchip_grf_info rk3588_sysgrf __initconst = { + .values = rk3588_defaults, + .num_values = ARRAY_SIZE(rk3588_defaults), +}; + static const struct of_device_id rockchip_grf_dt_match[] __initconst = { { @@ -147,6 +158,9 @@ static const struct of_device_id rockchip_grf_dt_match[] __initconst = { }, { .compatible = "rockchip,rk3566-pipe-grf", .data = (void *)&rk3566_pipegrf, + }, { + .compatible = "rockchip,rk3588-sys-grf", + .data = (void *)&rk3588_sysgrf, }, { /* sentinel */ }, }; diff --git a/drivers/soc/samsung/exynos-chipid.c b/drivers/soc/samsung/exynos-chipid.c index 0fb3631e7346..7ba45c4aff97 100644 --- a/drivers/soc/samsung/exynos-chipid.c +++ b/drivers/soc/samsung/exynos-chipid.c @@ -17,7 +17,6 @@ #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> -#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/slab.h> diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c index 5b2664da9853..250537d7cfd6 100644 --- a/drivers/soc/samsung/exynos-pmu.c +++ b/drivers/soc/samsung/exynos-pmu.c @@ -7,9 +7,9 @@ #include <linux/of.h> #include <linux/of_address.h> -#include <linux/of_device.h> #include <linux/mfd/core.h> #include <linux/mfd/syscon.h> +#include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/delay.h> diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c index 4c4864cd2342..4458b2e0562b 100644 --- a/drivers/soc/sunxi/sunxi_sram.c +++ b/drivers/soc/sunxi/sunxi_sram.c @@ -15,7 +15,7 @@ #include <linux/module.h> #include <linux/of.h> #include <linux/of_address.h> -#include <linux/of_device.h> +#include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/regmap.h> diff --git a/drivers/soc/tegra/cbb/tegra-cbb.c b/drivers/soc/tegra/cbb/tegra-cbb.c index bd96204a68ee..84ab46c9d9f5 100644 --- a/drivers/soc/tegra/cbb/tegra-cbb.c +++ b/drivers/soc/tegra/cbb/tegra-cbb.c @@ -7,13 +7,9 @@ #include <linux/cpufeature.h> #include <linux/debugfs.h> #include <linux/module.h> -#include <linux/of.h> -#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/device.h> #include <linux/io.h> -#include <linux/of_irq.h> -#include <linux/of_address.h> #include <linux/interrupt.h> #include <linux/ioport.h> #include <soc/tegra/fuse.h> @@ -126,20 +122,16 @@ int tegra_cbb_get_irq(struct platform_device *pdev, unsigned int *nonsec_irq, if (num_intr == 2) { irq = platform_get_irq(pdev, index); - if (irq <= 0) { - dev_err(&pdev->dev, "failed to get non-secure IRQ: %d\n", irq); + if (irq <= 0) return -ENOENT; - } *nonsec_irq = irq; index++; } irq = platform_get_irq(pdev, index); - if (irq <= 0) { - dev_err(&pdev->dev, "failed to get secure IRQ: %d\n", irq); + if (irq <= 0) return -ENOENT; - } *sec_irq = irq; diff --git a/drivers/soc/tegra/cbb/tegra194-cbb.c b/drivers/soc/tegra/cbb/tegra194-cbb.c index 54d7ce05c636..cf6886f362d3 100644 --- a/drivers/soc/tegra/cbb/tegra194-cbb.c +++ b/drivers/soc/tegra/cbb/tegra194-cbb.c @@ -15,12 +15,10 @@ #include <linux/debugfs.h> #include <linux/module.h> #include <linux/of.h> -#include <linux/of_device.h> +#include <linux/of_address.h> #include <linux/platform_device.h> #include <linux/device.h> #include <linux/io.h> -#include <linux/of_irq.h> -#include <linux/of_address.h> #include <linux/interrupt.h> #include <linux/ioport.h> #include <soc/tegra/fuse.h> diff --git a/drivers/soc/tegra/cbb/tegra234-cbb.c b/drivers/soc/tegra/cbb/tegra234-cbb.c index 5d16161b2566..5cf0e8c34164 100644 --- a/drivers/soc/tegra/cbb/tegra234-cbb.c +++ b/drivers/soc/tegra/cbb/tegra234-cbb.c @@ -16,12 +16,9 @@ #include <linux/debugfs.h> #include <linux/module.h> #include <linux/of.h> -#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/device.h> #include <linux/io.h> -#include <linux/of_irq.h> -#include <linux/of_address.h> #include <linux/interrupt.h> #include <linux/ioport.h> #include <soc/tegra/fuse.h> diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index d7a37f5d4527..a2c28f493a75 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c @@ -125,13 +125,10 @@ static int tegra_fuse_probe(struct platform_device *pdev) return err; /* take over the memory region from the early initialization */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + fuse->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); + if (IS_ERR(fuse->base)) + return PTR_ERR(fuse->base); fuse->phys = res->start; - fuse->base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(fuse->base)) { - err = PTR_ERR(fuse->base); - return err; - } fuse->clk = devm_clk_get(&pdev->dev, "fuse"); if (IS_ERR(fuse->clk)) { diff --git a/drivers/soc/tegra/fuse/fuse-tegra20.c b/drivers/soc/tegra/fuse/fuse-tegra20.c index 12503f563e36..fdecf7b7c246 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra20.c +++ b/drivers/soc/tegra/fuse/fuse-tegra20.c @@ -14,7 +14,7 @@ #include <linux/io.h> #include <linux/kernel.h> #include <linux/kobject.h> -#include <linux/of_device.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/random.h> diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c index c759fb7c8adc..e94d46372a63 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra30.c +++ b/drivers/soc/tegra/fuse/fuse-tegra30.c @@ -10,8 +10,6 @@ #include <linux/kernel.h> #include <linux/nvmem-consumer.h> #include <linux/nvmem-provider.h> -#include <linux/of_device.h> -#include <linux/of_address.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/random.h> diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c index eb0a1d924526..da970f3dbf35 100644 --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c @@ -4,13 +4,13 @@ */ #include <linux/export.h> +#include <linux/io.h> #include <linux/kernel.h> #include <linux/of.h> #include <linux/of_address.h> -#include <linux/io.h> -#include <soc/tegra/fuse.h> #include <soc/tegra/common.h> +#include <soc/tegra/fuse.h> #include "fuse.h" diff --git a/drivers/soc/ti/k3-ringacc.c b/drivers/soc/ti/k3-ringacc.c index 8f131368a758..148f54d9691d 100644 --- a/drivers/soc/ti/k3-ringacc.c +++ b/drivers/soc/ti/k3-ringacc.c @@ -9,7 +9,6 @@ #include <linux/io.h> #include <linux/module.h> #include <linux/of.h> -#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/sys_soc.h> #include <linux/dma/ti-cppi5.h> @@ -125,6 +124,7 @@ struct k3_ring_ops { * @occ: Occupancy * @windex: Write index * @rindex: Read index + * @tdown_complete: Tear down complete state */ struct k3_ring_state { u32 free; @@ -192,7 +192,7 @@ struct k3_ringacc_ops { * @num_rings: number of ring in RA * @rings_inuse: bitfield for ring usage tracking * @rm_gp_range: general purpose rings range from tisci - * @dma_ring_reset_quirk: DMA reset w/a enable + * @dma_ring_reset_quirk: DMA reset workaround enable * @num_proxies: number of RA proxies * @proxy_inuse: bitfield for proxy usage tracking * @rings: array of rings descriptors (struct @k3_ring) @@ -229,9 +229,9 @@ struct k3_ringacc { }; /** - * struct k3_ringacc - Rings accelerator SoC data + * struct k3_ringacc_soc_data - Rings accelerator SoC data * - * @dma_ring_reset_quirk: DMA reset w/a enable + * @dma_ring_reset_quirk: DMA reset workaround enable */ struct k3_ringacc_soc_data { unsigned dma_ring_reset_quirk:1; @@ -1368,15 +1368,12 @@ static int k3_ringacc_init(struct platform_device *pdev, const struct soc_device_attribute *soc; void __iomem *base_fifo, *base_rt; struct device *dev = &pdev->dev; - struct resource *res; int ret, i; dev->msi.domain = of_msi_get_domain(dev, dev->of_node, DOMAIN_BUS_TI_SCI_INTA_MSI); - if (!dev->msi.domain) { - dev_err(dev, "Failed to get MSI domain\n"); + if (!dev->msi.domain) return -EPROBE_DEFER; - } ret = k3_ringacc_probe_dt(ringacc); if (ret) @@ -1389,24 +1386,20 @@ static int k3_ringacc_init(struct platform_device *pdev, ringacc->dma_ring_reset_quirk = soc_data->dma_ring_reset_quirk; } - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rt"); - base_rt = devm_ioremap_resource(dev, res); + base_rt = devm_platform_ioremap_resource_byname(pdev, "rt"); if (IS_ERR(base_rt)) return PTR_ERR(base_rt); - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fifos"); - base_fifo = devm_ioremap_resource(dev, res); + base_fifo = devm_platform_ioremap_resource_byname(pdev, "fifos"); if (IS_ERR(base_fifo)) return PTR_ERR(base_fifo); - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "proxy_gcfg"); - ringacc->proxy_gcfg = devm_ioremap_resource(dev, res); + ringacc->proxy_gcfg = devm_platform_ioremap_resource_byname(pdev, "proxy_gcfg"); if (IS_ERR(ringacc->proxy_gcfg)) return PTR_ERR(ringacc->proxy_gcfg); - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "proxy_target"); - ringacc->proxy_target_base = devm_ioremap_resource(dev, res); + ringacc->proxy_target_base = devm_platform_ioremap_resource_byname(pdev, + "proxy_target"); if (IS_ERR(ringacc->proxy_target_base)) return PTR_ERR(ringacc->proxy_target_base); @@ -1473,7 +1466,6 @@ struct k3_ringacc *k3_ringacc_dmarings_init(struct platform_device *pdev, struct device *dev = &pdev->dev; struct k3_ringacc *ringacc; void __iomem *base_rt; - struct resource *res; int i; ringacc = devm_kzalloc(dev, sizeof(*ringacc), GFP_KERNEL); @@ -1488,8 +1480,7 @@ struct k3_ringacc *k3_ringacc_dmarings_init(struct platform_device *pdev, mutex_init(&ringacc->req_lock); - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ringrt"); - base_rt = devm_ioremap_resource(dev, res); + base_rt = devm_platform_ioremap_resource_byname(pdev, "ringrt"); if (IS_ERR(base_rt)) return ERR_CAST(base_rt); diff --git a/drivers/soc/ti/k3-socinfo.c b/drivers/soc/ti/k3-socinfo.c index ad97e08a25f6..6ea9b8c7d335 100644 --- a/drivers/soc/ti/k3-socinfo.c +++ b/drivers/soc/ti/k3-socinfo.c @@ -45,6 +45,7 @@ static const struct k3_soc_id { { 0xBB7E, "AM62X" }, { 0xBB80, "J784S4" }, { 0xBB8D, "AM62AX" }, + { 0xBB9D, "AM62PX" }, }; static int diff --git a/drivers/soc/ti/pruss.c b/drivers/soc/ti/pruss.c index 7fdefee1ed87..f49f8492dde5 100644 --- a/drivers/soc/ti/pruss.c +++ b/drivers/soc/ti/pruss.c @@ -14,8 +14,10 @@ #include <linux/io.h> #include <linux/mfd/syscon.h> #include <linux/module.h> +#include <linux/of.h> #include <linux/of_address.h> -#include <linux/of_device.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/pruss_driver.h> #include <linux/regmap.h> diff --git a/drivers/soc/ti/ti_sci_inta_msi.c b/drivers/soc/ti/ti_sci_inta_msi.c index b9251e1d9a5c..c36364522157 100644 --- a/drivers/soc/ti/ti_sci_inta_msi.c +++ b/drivers/soc/ti/ti_sci_inta_msi.c @@ -9,9 +9,10 @@ #include <linux/irq.h> #include <linux/irqdomain.h> #include <linux/msi.h> +#include <linux/of.h> #include <linux/of_address.h> -#include <linux/of_device.h> #include <linux/of_irq.h> +#include <linux/platform_device.h> #include <linux/soc/ti/ti_sci_inta_msi.h> #include <linux/soc/ti/ti_sci_protocol.h> diff --git a/drivers/soc/xilinx/xlnx_event_manager.c b/drivers/soc/xilinx/xlnx_event_manager.c index f9d9b82b562d..86a048a10a13 100644 --- a/drivers/soc/xilinx/xlnx_event_manager.c +++ b/drivers/soc/xilinx/xlnx_event_manager.c @@ -666,7 +666,7 @@ static int xlnx_event_manager_probe(struct platform_device *pdev) return ret; } -static int xlnx_event_manager_remove(struct platform_device *pdev) +static void xlnx_event_manager_remove(struct platform_device *pdev) { int i; struct registered_event_data *eve_data; @@ -691,13 +691,11 @@ static int xlnx_event_manager_remove(struct platform_device *pdev) xlnx_event_cleanup_sgi(pdev); event_manager_availability = -EACCES; - - return ret; } static struct platform_driver xlnx_event_manager_driver = { .probe = xlnx_event_manager_probe, - .remove = xlnx_event_manager_remove, + .remove_new = xlnx_event_manager_remove, .driver = { .name = "xlnx_event_manager", }, diff --git a/drivers/soc/xilinx/zynqmp_power.c b/drivers/soc/xilinx/zynqmp_power.c index 641dcc958911..c2c819701eec 100644 --- a/drivers/soc/xilinx/zynqmp_power.c +++ b/drivers/soc/xilinx/zynqmp_power.c @@ -11,6 +11,7 @@ #include <linux/mailbox_client.h> #include <linux/module.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/reboot.h> #include <linux/suspend.h> @@ -242,8 +243,8 @@ static int zynqmp_pm_probe(struct platform_device *pdev) } } else if (of_property_present(pdev->dev.of_node, "interrupts")) { irq = platform_get_irq(pdev, 0); - if (irq <= 0) - return -ENXIO; + if (irq < 0) + return irq; ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, zynqmp_pm_isr, |