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Diffstat (limited to 'drivers/staging/media/atomisp/i2c/ov2680.h')
-rw-r--r--drivers/staging/media/atomisp/i2c/ov2680.h836
1 files changed, 82 insertions, 754 deletions
diff --git a/drivers/staging/media/atomisp/i2c/ov2680.h b/drivers/staging/media/atomisp/i2c/ov2680.h
index 7ab337b859ad..a37af0a74a53 100644
--- a/drivers/staging/media/atomisp/i2c/ov2680.h
+++ b/drivers/staging/media/atomisp/i2c/ov2680.h
@@ -32,53 +32,22 @@
#include "../include/linux/atomisp_platform.h"
-/* Defines for register writes and register array processing */
-#define I2C_MSG_LENGTH 0x2
-#define I2C_RETRY_COUNT 5
+#define OV2680_NATIVE_WIDTH 1616
+#define OV2680_NATIVE_HEIGHT 1216
-#define OV2680_FOCAL_LENGTH_NUM 334 /*3.34mm*/
-#define OV2680_FOCAL_LENGTH_DEM 100
-#define OV2680_F_NUMBER_DEFAULT_NUM 24
-#define OV2680_F_NUMBER_DEM 10
+/* 1704 * 1294 * 30fps = 66MHz pixel clock */
+#define OV2680_PIXELS_PER_LINE 1704
+#define OV2680_LINES_PER_FRAME 1294
+#define OV2680_FPS 30
+#define OV2680_SKIP_FRAMES 3
-#define OV2680_BIN_FACTOR_MAX 4
+/* If possible send 16 extra rows / lines to the ISP as padding */
+#define OV2680_END_MARGIN 16
-#define MAX_FMTS 1
+#define OV2680_FOCAL_LENGTH_NUM 334 /*3.34mm*/
-/* sensor_mode_data read_mode adaptation */
-#define OV2680_READ_MODE_BINNING_ON 0x0400
-#define OV2680_READ_MODE_BINNING_OFF 0x00
-#define OV2680_INTEGRATION_TIME_MARGIN 8
-
-#define OV2680_MAX_EXPOSURE_VALUE 0xFFF1
-#define OV2680_MAX_GAIN_VALUE 0xFF
-
-/*
- * focal length bits definition:
- * bits 31-16: numerator, bits 15-0: denominator
- */
-#define OV2680_FOCAL_LENGTH_DEFAULT 0x1B70064
-
-/*
- * current f-number bits definition:
- * bits 31-16: numerator, bits 15-0: denominator
- */
-#define OV2680_F_NUMBER_DEFAULT 0x18000a
-
-/*
- * f-number range bits definition:
- * bits 31-24: max f-number numerator
- * bits 23-16: max f-number denominator
- * bits 15-8: min f-number numerator
- * bits 7-0: min f-number denominator
- */
-#define OV2680_F_NUMBER_RANGE 0x180a180a
-#define OV2680_ID 0x2680
-
-#define OV2680_FINE_INTG_TIME_MIN 0
-#define OV2680_FINE_INTG_TIME_MAX_MARGIN 0
-#define OV2680_COARSE_INTG_TIME_MIN 1
-#define OV2680_COARSE_INTG_TIME_MAX_MARGIN 6
+#define OV2680_INTEGRATION_TIME_MARGIN 8
+#define OV2680_ID 0x2680
/*
* OV2680 System control registers
@@ -92,74 +61,49 @@
#define OV2680_SC_CMMN_SCCB_ID 0x302B /* 0x300C*/
#define OV2680_SC_CMMN_SUB_ID 0x302A /* process, version*/
-#define OV2680_GROUP_ACCESS 0x3208 /*Bit[7:4] Group control, Bit[3:0] Group ID*/
-
-#define OV2680_EXPOSURE_H 0x3500 /*Bit[3:0] Bit[19:16] of exposure, remaining 16 bits lies in Reg0x3501&Reg0x3502*/
-#define OV2680_EXPOSURE_M 0x3501
-#define OV2680_EXPOSURE_L 0x3502
-#define OV2680_AGC_H 0x350A /*Bit[1:0] means Bit[9:8] of gain*/
-#define OV2680_AGC_L 0x350B /*Bit[7:0] of gain*/
-
-#define OV2680_HORIZONTAL_START_H 0x3800 /*Bit[11:8]*/
-#define OV2680_HORIZONTAL_START_L 0x3801 /*Bit[7:0]*/
-#define OV2680_VERTICAL_START_H 0x3802 /*Bit[11:8]*/
-#define OV2680_VERTICAL_START_L 0x3803 /*Bit[7:0]*/
-#define OV2680_HORIZONTAL_END_H 0x3804 /*Bit[11:8]*/
-#define OV2680_HORIZONTAL_END_L 0x3805 /*Bit[7:0]*/
-#define OV2680_VERTICAL_END_H 0x3806 /*Bit[11:8]*/
-#define OV2680_VERTICAL_END_L 0x3807 /*Bit[7:0]*/
-#define OV2680_HORIZONTAL_OUTPUT_SIZE_H 0x3808 /*Bit[3:0]*/
-#define OV2680_HORIZONTAL_OUTPUT_SIZE_L 0x3809 /*Bit[7:0]*/
-#define OV2680_VERTICAL_OUTPUT_SIZE_H 0x380a /*Bit[3:0]*/
-#define OV2680_VERTICAL_OUTPUT_SIZE_L 0x380b /*Bit[7:0]*/
-#define OV2680_TIMING_HTS_H 0x380C /*High 8-bit, and low 8-bit HTS address is 0x380d*/
-#define OV2680_TIMING_HTS_L 0x380D /*High 8-bit, and low 8-bit HTS address is 0x380d*/
-#define OV2680_TIMING_VTS_H 0x380e /*High 8-bit, and low 8-bit HTS address is 0x380f*/
-#define OV2680_TIMING_VTS_L 0x380f /*High 8-bit, and low 8-bit HTS address is 0x380f*/
-#define OV2680_FRAME_OFF_NUM 0x4202
+#define OV2680_GROUP_ACCESS 0x3208 /*Bit[7:4] Group control, Bit[3:0] Group ID*/
+
+#define OV2680_REG_EXPOSURE_PK_HIGH 0x3500
+#define OV2680_REG_GAIN_PK 0x350a
+
+#define OV2680_HORIZONTAL_START_H 0x3800 /* Bit[11:8] */
+#define OV2680_HORIZONTAL_START_L 0x3801 /* Bit[7:0] */
+#define OV2680_VERTICAL_START_H 0x3802 /* Bit[11:8] */
+#define OV2680_VERTICAL_START_L 0x3803 /* Bit[7:0] */
+#define OV2680_HORIZONTAL_END_H 0x3804 /* Bit[11:8] */
+#define OV2680_HORIZONTAL_END_L 0x3805 /* Bit[7:0] */
+#define OV2680_VERTICAL_END_H 0x3806 /* Bit[11:8] */
+#define OV2680_VERTICAL_END_L 0x3807 /* Bit[7:0] */
+#define OV2680_HORIZONTAL_OUTPUT_SIZE_H 0x3808 /* Bit[11:8] */
+#define OV2680_HORIZONTAL_OUTPUT_SIZE_L 0x3809 /* Bit[7:0] */
+#define OV2680_VERTICAL_OUTPUT_SIZE_H 0x380a /* Bit[11:8] */
+#define OV2680_VERTICAL_OUTPUT_SIZE_L 0x380b /* Bit[7:0] */
+#define OV2680_HTS 0x380c
+#define OV2680_VTS 0x380e
+#define OV2680_ISP_X_WIN 0x3810
+#define OV2680_ISP_Y_WIN 0x3812
+#define OV2680_X_INC 0x3814
+#define OV2680_Y_INC 0x3815
+
+#define OV2680_FRAME_OFF_NUM 0x4202
/*Flip/Mirror*/
-#define OV2680_FLIP_REG 0x3820
-#define OV2680_MIRROR_REG 0x3821
-#define OV2680_FLIP_BIT 1
-#define OV2680_MIRROR_BIT 2
-#define OV2680_FLIP_MIRROR_BIT_ENABLE 4
+#define OV2680_REG_FORMAT1 0x3820
+#define OV2680_REG_FORMAT2 0x3821
#define OV2680_MWB_RED_GAIN_H 0x5004/*0x3400*/
#define OV2680_MWB_GREEN_GAIN_H 0x5006/*0x3402*/
#define OV2680_MWB_BLUE_GAIN_H 0x5008/*0x3404*/
-#define OV2680_MWB_GAIN_MAX 0x0fff
-
-#define OV2680_START_STREAMING 0x01
-#define OV2680_STOP_STREAMING 0x00
-
-#define OV2680_INVALID_CONFIG 0xffffffff
+#define OV2680_MWB_GAIN_MAX 0x0fff
-struct regval_list {
- u16 reg_num;
- u8 value;
-};
+#define OV2680_REG_ISP_CTRL00 0x5080
-struct ov2680_resolution {
- const struct ov2680_reg *regs;
- int res;
- int width;
- int height;
- int fps;
- int pix_clk_freq;
- u32 skip_frames;
- u16 pixels_per_line;
- u16 lines_per_frame;
- u8 bin_factor_x;
- u8 bin_factor_y;
- u8 bin_mode;
-};
+#define OV2680_X_WIN 0x5704
+#define OV2680_Y_WIN 0x5706
+#define OV2680_WIN_CONTROL 0x5708
-struct ov2680_format {
- u8 *desc;
- u32 pixelformat;
- struct ov2680_reg *regs;
-};
+#define OV2680_START_STREAMING 0x01
+#define OV2680_STOP_STREAMING 0x00
/*
* ov2680 device structure.
@@ -168,13 +112,32 @@ struct ov2680_device {
struct v4l2_subdev sd;
struct media_pad pad;
struct mutex input_lock;
- struct v4l2_ctrl_handler ctrl_handler;
- struct ov2680_resolution *res;
- struct camera_sensor_platform_data *platform_data;
- bool power_on;
- u16 exposure;
- u16 gain;
- u16 digitgain;
+ struct i2c_client *client;
+ struct gpio_desc *powerdown;
+ struct gpio_desc *powerdown_alt;
+ bool is_streaming;
+
+ struct ov2680_mode {
+ struct v4l2_mbus_framefmt fmt;
+ bool binning;
+ u16 h_start;
+ u16 v_start;
+ u16 h_end;
+ u16 v_end;
+ u16 h_output_size;
+ u16 v_output_size;
+ u16 hts;
+ u16 vts;
+ } mode;
+
+ struct ov2680_ctrls {
+ struct v4l2_ctrl_handler handler;
+ struct v4l2_ctrl *hflip;
+ struct v4l2_ctrl *vflip;
+ struct v4l2_ctrl *exposure;
+ struct v4l2_ctrl *gain;
+ struct v4l2_ctrl *test_pattern;
+ } ctrls;
};
/**
@@ -192,17 +155,13 @@ struct ov2680_reg {
#define to_ov2680_sensor(x) container_of(x, struct ov2680_device, sd)
-#define OV2680_MAX_WRITE_BUF_SIZE 30
+static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
+{
+ struct ov2680_device *sensor =
+ container_of(ctrl->handler, struct ov2680_device, ctrls.handler);
-struct ov2680_write_buffer {
- u16 addr;
- u8 data[OV2680_MAX_WRITE_BUF_SIZE];
-};
-
-struct ov2680_write_ctrl {
- int index;
- struct ov2680_write_buffer buffer;
-};
+ return &sensor->sd;
+}
static struct ov2680_reg const ov2680_global_setting[] = {
{0x0103, 0x01},
@@ -240,6 +199,8 @@ static struct ov2680_reg const ov2680_global_setting[] = {
{0x3819, 0x04},
{0x4000, 0x81},
{0x4001, 0x40},
+ {0x4008, 0x00},
+ {0x4009, 0x03},
{0x4602, 0x02},
{0x481f, 0x36},
{0x4825, 0x36},
@@ -252,6 +213,8 @@ static struct ov2680_reg const ov2680_global_setting[] = {
{0x5008, 0x04},
{0x5009, 0x00},
{0x5080, 0x00},
+ {0x5081, 0x41},
+ {0x5708, 0x01}, /* add for full size flip off and mirror off 2014/09/11 */
{0x3701, 0x64}, //add on 14/05/13
{0x3784, 0x0c}, //based OV2680_R1A_AM10.ovt add on 14/06/13
{0x5780, 0x3e}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13
@@ -276,642 +239,7 @@ static struct ov2680_reg const ov2680_global_setting[] = {
{0x5793, 0x00},
{0x5794, 0x03}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13
{0x0100, 0x00}, //stream off
-
- {}
-};
-
-/*
- * 176x144 30fps VBlanking 1lane 10Bit (binning)
- */
-static struct ov2680_reg const ov2680_QCIF_30fps[] = {
- {0x3086, 0x01},
- {0x370a, 0x23},
- {0x3801, 0xa0},
- {0x3802, 0x00},
- {0x3803, 0x78},
- {0x3804, 0x05},
- {0x3805, 0xaf},
- {0x3806, 0x04},
- {0x3807, 0x47},
- {0x3808, 0x00},
- {0x3809, 0xC0},
- {0x380a, 0x00},
- {0x380b, 0xa0},
- {0x380c, 0x06},
- {0x380d, 0xb0},
- {0x3810, 0x00},
- {0x3811, 0x04},
- {0x3812, 0x00},
- {0x3813, 0x04},
- {0x3814, 0x31},
- {0x3815, 0x31},
- {0x4000, 0x81},
- {0x4001, 0x40},
- {0x4008, 0x00},
- {0x4009, 0x03},
- {0x5081, 0x41},
- {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
- {0x5704, 0x10},
- {0x5705, 0xa0},
- {0x5706, 0x0c},
- {0x5707, 0x78},
- {0x3820, 0xc2},
- {0x3821, 0x01},
- // {0x5090, 0x0c},
- {}
-};
-
-/*
- * 352x288 30fps VBlanking 1lane 10Bit (binning)
- */
-static struct ov2680_reg const ov2680_CIF_30fps[] = {
- {0x3086, 0x01},
- {0x370a, 0x23},
- {0x3801, 0xa0},
- {0x3802, 0x00},
- {0x3803, 0x78},
- {0x3804, 0x03},
- {0x3805, 0x8f},
- {0x3806, 0x02},
- {0x3807, 0xe7},
- {0x3808, 0x01},
- {0x3809, 0x70},
- {0x380a, 0x01},
- {0x380b, 0x30},
- {0x380c, 0x06},
- {0x380d, 0xb0},
- {0x3810, 0x00},
- {0x3811, 0x04},
- {0x3812, 0x00},
- {0x3813, 0x04},
- {0x3814, 0x31},
- {0x3815, 0x31},
- {0x4008, 0x00},
- {0x4009, 0x03},
- {0x5081, 0x41},
- {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
- {0x5704, 0x10},
- {0x5705, 0xa0},
- {0x5706, 0x0c},
- {0x5707, 0x78},
- {0x3820, 0xc2},
- {0x3821, 0x01},
- // {0x5090, 0x0c},
{}
};
-/*
- * 336x256 30fps VBlanking 1lane 10Bit (binning)
- */
-static struct ov2680_reg const ov2680_QVGA_30fps[] = {
- {0x3086, 0x01},
- {0x370a, 0x23},
- {0x3801, 0xa0},
- {0x3802, 0x00},
- {0x3803, 0x78},
- {0x3804, 0x03},
- {0x3805, 0x4f},
- {0x3806, 0x02},
- {0x3807, 0x87},
- {0x3808, 0x01},
- {0x3809, 0x50},
- {0x380a, 0x01},
- {0x380b, 0x00},
- {0x380c, 0x06},
- {0x380d, 0xb0},
- {0x3810, 0x00},
- {0x3811, 0x04},
- {0x3812, 0x00},
- {0x3813, 0x04},
- {0x3814, 0x31},
- {0x3815, 0x31},
- {0x4008, 0x00},
- {0x4009, 0x03},
- {0x5081, 0x41},
- {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
- {0x5704, 0x10},
- {0x5705, 0xa0},
- {0x5706, 0x0c},
- {0x5707, 0x78},
- {0x3820, 0xc2},
- {0x3821, 0x01},
- // {0x5090, 0x0c},
- {}
-};
-
-/*
- * 656x496 30fps VBlanking 1lane 10Bit (binning)
- */
-static struct ov2680_reg const ov2680_656x496_30fps[] = {
- {0x3086, 0x01},
- {0x370a, 0x23},
- {0x3801, 0xa0},
- {0x3802, 0x00},
- {0x3803, 0x78},
- {0x3804, 0x05},
- {0x3805, 0xcf},
- {0x3806, 0x04},
- {0x3807, 0x67},
- {0x3808, 0x02},
- {0x3809, 0x90},
- {0x380a, 0x01},
- {0x380b, 0xf0},
- {0x380c, 0x06},
- {0x380d, 0xb0},
- {0x3810, 0x00},
- {0x3811, 0x04},
- {0x3812, 0x00},
- {0x3813, 0x04},
- {0x3814, 0x31},
- {0x3815, 0x31},
- {0x4008, 0x00},
- {0x4009, 0x03},
- {0x5081, 0x41},
- {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
- {0x5704, 0x10},
- {0x5705, 0xa0},
- {0x5706, 0x0c},
- {0x5707, 0x78},
- {0x3820, 0xc2},
- {0x3821, 0x01},
- // {0x5090, 0x0c},
- {}
-};
-
-/*
- * 720x592 30fps VBlanking 1lane 10Bit (binning)
- */
-static struct ov2680_reg const ov2680_720x592_30fps[] = {
- {0x3086, 0x01},
- {0x370a, 0x23},
- {0x3801, 0x00}, // X_ADDR_START;
- {0x3802, 0x00},
- {0x3803, 0x00}, // Y_ADDR_START;
- {0x3804, 0x05},
- {0x3805, 0xaf}, // X_ADDR_END;
- {0x3806, 0x04},
- {0x3807, 0xaf}, // Y_ADDR_END;
- {0x3808, 0x02},
- {0x3809, 0xd0}, // X_OUTPUT_SIZE;
- {0x380a, 0x02},
- {0x380b, 0x50}, // Y_OUTPUT_SIZE;
- {0x380c, 0x06},
- {0x380d, 0xac}, // HTS;
- {0x3810, 0x00},
- {0x3811, 0x00},
- {0x3812, 0x00},
- {0x3813, 0x00},
- {0x3814, 0x31},
- {0x3815, 0x31},
- {0x4008, 0x00},
- {0x4009, 0x03},
- {0x5708, 0x00},
- {0x5704, 0x02},
- {0x5705, 0xd0}, // X_WIN;
- {0x5706, 0x02},
- {0x5707, 0x50}, // Y_WIN;
- {0x3820, 0xc2}, // FLIP_FORMAT;
- {0x3821, 0x01}, // MIRROR_FORMAT;
- {0x5090, 0x00}, // PRE ISP CTRL16, default value is 0x0C;
- // BIT[3]: Mirror order, BG or GB;
- // BIT[2]: Flip order, BR or RB;
- {0x5081, 0x41},
- {}
-};
-
-/*
- * 800x600 30fps VBlanking 1lane 10Bit (binning)
- */
-static struct ov2680_reg const ov2680_800x600_30fps[] = {
- {0x3086, 0x01},
- {0x370a, 0x23},
- {0x3801, 0x00}, /* hstart 0 */
- {0x3802, 0x00},
- {0x3803, 0x00}, /* vstart 0 */
- {0x3804, 0x06},
- {0x3805, 0x4f}, /* hend 1615 */
- {0x3806, 0x04},
- {0x3807, 0xbf}, /* vend 1215 */
- {0x3808, 0x03},
- {0x3809, 0x20}, /* hsize 800 */
- {0x380a, 0x02},
- {0x380b, 0x58}, /* vsize 600 */
- {0x380c, 0x06},
- {0x380d, 0xac}, /* htotal 1708 */
- {0x3810, 0x00},
- {0x3811, 0x00},
- {0x3812, 0x00},
- {0x3813, 0x00},
- {0x3814, 0x31},
- {0x3815, 0x31},
- {0x5708, 0x00},
- {0x5704, 0x03},
- {0x5705, 0x20},
- {0x5706, 0x02},
- {0x5707, 0x58},
- {0x3820, 0xc2},
- {0x3821, 0x01},
- {0x5090, 0x00},
- {0x4008, 0x00},
- {0x4009, 0x03},
- {0x5081, 0x41},
- {}
-};
-
-/*
- * 720p=1280*720 30fps VBlanking 1lane 10Bit (no-Scaling)
- */
-static struct ov2680_reg const ov2680_720p_30fps[] = {
- {0x3086, 0x00},
- {0x370a, 0x21},
- {0x3801, 0xa0}, /* hstart 160 */
- {0x3802, 0x00},
- {0x3803, 0xf2}, /* vstart 242 */
- {0x3804, 0x05},
- {0x3805, 0xbf}, /* hend 1471 */
- {0x3806, 0x03},
- {0x3807, 0xdd}, /* vend 989 */
- {0x3808, 0x05},
- {0x3809, 0x10}, /* hsize 1296 */
- {0x380a, 0x02},
- {0x380b, 0xe0}, /* vsize 736 */
- {0x380c, 0x06},
- {0x380d, 0xa8}, /* htotal 1704 */
- {0x3810, 0x00},
- {0x3811, 0x08},
- {0x3812, 0x00},
- {0x3813, 0x06},
- {0x3814, 0x11},
- {0x3815, 0x11},
- {0x4008, 0x02},
- {0x4009, 0x09},
- {0x5081, 0x41},
- {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
- {0x5704, 0x10},
- {0x5705, 0xa0},
- {0x5706, 0x0c},
- {0x5707, 0x78},
- {0x3820, 0xc0},
- {0x3821, 0x00},
- // {0x5090, 0x0c},
- {}
-};
-
-/*
- * 1296x976 30fps VBlanking 1lane 10Bit(no-scaling)
- */
-static struct ov2680_reg const ov2680_1296x976_30fps[] = {
- {0x3086, 0x00},
- {0x370a, 0x21},
- {0x3801, 0xa0}, /* hstart 160 */
- {0x3802, 0x00},
- {0x3803, 0x78}, /* vstart 120 */
- {0x3804, 0x05},
- {0x3805, 0xbf}, /* hend 1471 */
- {0x3806, 0x04},
- {0x3807, 0x57}, /* vend 1111 */
- {0x3808, 0x05},
- {0x3809, 0x10}, /* hsize 1296 */
- {0x380a, 0x03},
- {0x380b, 0xd0}, /* vsize 976 */
- {0x380c, 0x06},
- {0x380d, 0xa8}, /* htotal 1704 */
- {0x3810, 0x00},
- {0x3811, 0x08},
- {0x3812, 0x00},
- {0x3813, 0x08},
- {0x3814, 0x11},
- {0x3815, 0x11},
- {0x4008, 0x02},
- {0x4009, 0x09},
- {0x5081, 0x41},
- {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
- {0x5704, 0x10},
- {0x5705, 0xa0},
- {0x5706, 0x0c},
- {0x5707, 0x78},
- {0x3820, 0xc0},
- {0x3821, 0x00}, //mirror/flip
- // {0x5090, 0x0c},
- {}
-};
-
-/*
- * 1456*1096 30fps VBlanking 1lane 10bit(no-scaling)
- */
-static struct ov2680_reg const ov2680_1456x1096_30fps[] = {
- {0x3086, 0x00},
- {0x370a, 0x21},
- {0x3801, 0x90},
- {0x3802, 0x00},
- {0x3803, 0x78},
- {0x3804, 0x06},
- {0x3805, 0x4f},
- {0x3806, 0x04},
- {0x3807, 0xC0},
- {0x3808, 0x05},
- {0x3809, 0xb0},
- {0x380a, 0x04},
- {0x380b, 0x48},
- {0x380c, 0x06},
- {0x380d, 0xa8},
- {0x3810, 0x00},
- {0x3811, 0x08},
- {0x3812, 0x00},
- {0x3813, 0x00},
- {0x3814, 0x11},
- {0x3815, 0x11},
- {0x4008, 0x02},
- {0x4009, 0x09},
- {0x5081, 0x41},
- {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
- {0x5704, 0x10},
- {0x5705, 0xa0},
- {0x5706, 0x0c},
- {0x5707, 0x78},
- {0x3820, 0xc0},
- {0x3821, 0x00},
- // {0x5090, 0x0c},
- {}
-};
-
-/*
- *1616x916 30fps VBlanking 1lane 10bit
- */
-
-static struct ov2680_reg const ov2680_1616x916_30fps[] = {
- {0x3086, 0x00},
- {0x370a, 0x21},
- {0x3801, 0x00},
- {0x3802, 0x00},
- {0x3803, 0x96},
- {0x3804, 0x06},
- {0x3805, 0x4f},
- {0x3806, 0x04},
- {0x3807, 0x39},
- {0x3808, 0x06},
- {0x3809, 0x50},
- {0x380a, 0x03},
- {0x380b, 0x94},
- {0x380c, 0x06},
- {0x380d, 0xa8},
- {0x3810, 0x00},
- {0x3811, 0x00},
- {0x3812, 0x00},
- {0x3813, 0x08},
- {0x3814, 0x11},
- {0x3815, 0x11},
- {0x4008, 0x02},
- {0x4009, 0x09},
- {0x5081, 0x41},
- {0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11
- {0x5704, 0x06},
- {0x5705, 0x50},
- {0x5706, 0x03},
- {0x5707, 0x94},
- {0x3820, 0xc0},
- {0x3821, 0x00},
- // {0x5090, 0x0C},
- {}
-};
-
-/*
- * 1616x1082 30fps VBlanking 1lane 10Bit
- */
-static struct ov2680_reg const ov2680_1616x1082_30fps[] = {
- {0x3086, 0x00},
- {0x370a, 0x21},
- {0x3801, 0x00},
- {0x3802, 0x00},
- {0x3803, 0x86},
- {0x3804, 0x06},
- {0x3805, 0x4f},
- {0x3806, 0x04},
- {0x3807, 0xbf},
- {0x3808, 0x06},
- {0x3809, 0x50},
- {0x380a, 0x04},
- {0x380b, 0x3a},
- {0x380c, 0x06},
- {0x380d, 0xa8},
- {0x3810, 0x00},
- {0x3811, 0x00},
- {0x3812, 0x00},
- {0x3813, 0x00},
- {0x3814, 0x11},
- {0x3815, 0x11},
- {0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11
- {0x5704, 0x06},
- {0x5705, 0x50},
- {0x5706, 0x04},
- {0x5707, 0x3a},
- {0x3820, 0xc0},
- {0x3821, 0x00},
- // {0x5090, 0x0C},
- {0x4008, 0x02},
- {0x4009, 0x09},
- {0x5081, 0x41},
- {}
-};
-
-/*
- * 1616x1216 30fps VBlanking 1lane 10Bit
- */
-static struct ov2680_reg const ov2680_1616x1216_30fps[] = {
- {0x3086, 0x00},
- {0x370a, 0x21},
- {0x3801, 0x00},
- {0x3802, 0x00},
- {0x3803, 0x00},
- {0x3804, 0x06},
- {0x3805, 0x4f},
- {0x3806, 0x04},
- {0x3807, 0xbf},
- {0x3808, 0x06},
- {0x3809, 0x50},//50},//4line for mirror and flip
- {0x380a, 0x04},
- {0x380b, 0xc0},//c0},
- {0x380c, 0x06},
- {0x380d, 0xa8},
- {0x3810, 0x00},
- {0x3811, 0x00},
- {0x3812, 0x00},
- {0x3813, 0x00},
- {0x3814, 0x11},
- {0x3815, 0x11},
- {0x4008, 0x00},
- {0x4009, 0x0b},
- {0x5081, 0x01},
- {0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11
- {0x5704, 0x06},
- {0x5705, 0x50},
- {0x5706, 0x04},
- {0x5707, 0xcc},
- {0x3820, 0xc0},
- {0x3821, 0x00},
- // {0x5090, 0x0C},
- {}
-};
-
-static struct ov2680_resolution ov2680_res_preview[] = {
- {
- .width = 1616,
- .height = 1216,
- .pix_clk_freq = 66,
- .fps = 30,
- .pixels_per_line = 1698,//1704,
- .lines_per_frame = 1294,
- .bin_factor_x = 0,
- .bin_factor_y = 0,
- .bin_mode = 0,
- .skip_frames = 3,
- .regs = ov2680_1616x1216_30fps,
- },
- {
- .width = 1616,
- .height = 1082,
- .pix_clk_freq = 66,
- .fps = 30,
- .pixels_per_line = 1698,//1704,
- .lines_per_frame = 1294,
- .bin_factor_x = 0,
- .bin_factor_y = 0,
- .bin_mode = 0,
- .skip_frames = 3,
- .regs = ov2680_1616x1082_30fps,
- },
- {
- .width = 1616,
- .height = 916,
- .fps = 30,
- .pix_clk_freq = 66,
- .pixels_per_line = 1698,//1704,
- .lines_per_frame = 1294,
- .bin_factor_x = 0,
- .bin_factor_y = 0,
- .bin_mode = 0,
- .skip_frames = 3,
- .regs = ov2680_1616x916_30fps,
- },
- {
- .width = 1456,
- .height = 1096,
- .fps = 30,
- .pix_clk_freq = 66,
- .pixels_per_line = 1698,//1704,
- .lines_per_frame = 1294,
- .bin_factor_x = 0,
- .bin_factor_y = 0,
- .bin_mode = 0,
- .skip_frames = 3,
- .regs = ov2680_1456x1096_30fps,
- },
- {
- .width = 1296,
- .height = 976,
- .fps = 30,
- .pix_clk_freq = 66,
- .pixels_per_line = 1698,//1704,
- .lines_per_frame = 1294,
- .bin_factor_x = 0,
- .bin_factor_y = 0,
- .bin_mode = 0,
- .skip_frames = 3,
- .regs = ov2680_1296x976_30fps,
- },
- {
- .width = 1296,
- .height = 736,
- .fps = 60,
- .pix_clk_freq = 66,
- .pixels_per_line = 1698,//1704,
- .lines_per_frame = 1294,
- .bin_factor_x = 0,
- .bin_factor_y = 0,
- .bin_mode = 0,
- .skip_frames = 3,
- .regs = ov2680_720p_30fps,
- },
- {
- .width = 800,
- .height = 600,
- .fps = 60,
- .pix_clk_freq = 66,
- .pixels_per_line = 1698,//1704,
- .lines_per_frame = 1294,
- .bin_factor_x = 0,
- .bin_factor_y = 0,
- .bin_mode = 0,
- .skip_frames = 3,
- .regs = ov2680_800x600_30fps,
- },
- {
- .width = 720,
- .height = 592,
- .fps = 60,
- .pix_clk_freq = 66,
- .pixels_per_line = 1698,//1704,
- .lines_per_frame = 1294,
- .bin_factor_x = 0,
- .bin_factor_y = 0,
- .bin_mode = 0,
- .skip_frames = 3,
- .regs = ov2680_720x592_30fps,
- },
- {
- .width = 656,
- .height = 496,
- .fps = 60,
- .pix_clk_freq = 66,
- .pixels_per_line = 1698,//1704,
- .lines_per_frame = 1294,
- .bin_factor_x = 0,
- .bin_factor_y = 0,
- .bin_mode = 0,
- .skip_frames = 3,
- .regs = ov2680_656x496_30fps,
- },
- {
- .width = 336,
- .height = 256,
- .fps = 60,
- .pix_clk_freq = 66,
- .pixels_per_line = 1698,//1704,
- .lines_per_frame = 1294,
- .bin_factor_x = 0,
- .bin_factor_y = 0,
- .bin_mode = 0,
- .skip_frames = 3,
- .regs = ov2680_QVGA_30fps,
- },
- {
- .width = 352,
- .height = 288,
- .fps = 60,
- .pix_clk_freq = 66,
- .pixels_per_line = 1698,//1704,
- .lines_per_frame = 1294,
- .bin_factor_x = 0,
- .bin_factor_y = 0,
- .bin_mode = 0,
- .skip_frames = 3,
- .regs = ov2680_CIF_30fps,
- },
- {
- .width = 176,
- .height = 144,
- .fps = 60,
- .pix_clk_freq = 66,
- .pixels_per_line = 1698,//1704,
- .lines_per_frame = 1294,
- .bin_factor_x = 0,
- .bin_factor_y = 0,
- .bin_mode = 0,
- .skip_frames = 3,
- .regs = ov2680_QCIF_30fps,
- },
-};
-
-#define N_RES_PREVIEW (ARRAY_SIZE(ov2680_res_preview))
-
#endif
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