diff options
Diffstat (limited to 'drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host')
20 files changed, 0 insertions, 2053 deletions
diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx.c deleted file mode 100644 index 505e2b600beb..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - - -#include "system_global.h" - -const uint32_t N_SHORT_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID] = { - 4, /* 4 entries at CSI_RX_BACKEND0_ID*/ - 4, /* 4 entries at CSI_RX_BACKEND1_ID*/ - 4 /* 4 entries at CSI_RX_BACKEND2_ID*/ -}; - -const uint32_t N_LONG_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID] = { - 8, /* 8 entries at CSI_RX_BACKEND0_ID*/ - 4, /* 4 entries at CSI_RX_BACKEND1_ID*/ - 4 /* 4 entries at CSI_RX_BACKEND2_ID*/ -}; - -const uint32_t N_CSI_RX_FE_CTRL_DLANES[N_CSI_RX_FRONTEND_ID] = { - N_CSI_RX_DLANE_ID, /* 4 dlanes for CSI_RX_FR0NTEND0_ID */ - N_CSI_RX_DLANE_ID, /* 4 dlanes for CSI_RX_FR0NTEND1_ID */ - N_CSI_RX_DLANE_ID /* 4 dlanes for CSI_RX_FR0NTEND2_ID */ -}; - -/* sid_width for CSI_RX_BACKEND<N>_ID */ -const uint32_t N_CSI_RX_BE_SID_WIDTH[N_CSI_RX_BACKEND_ID] = { - 3, - 2, - 2 -}; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_local.h deleted file mode 100644 index a2e9d54a4a37..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_local.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __CSI_RX_LOCAL_H_INCLUDED__ -#define __CSI_RX_LOCAL_H_INCLUDED__ - -#include "csi_rx_global.h" -#define N_CSI_RX_BE_MIPI_COMP_FMT_REG 4 -#define N_CSI_RX_BE_MIPI_CUSTOM_PEC 12 -#define N_CSI_RX_BE_SHORT_PKT_LUT 4 -#define N_CSI_RX_BE_LONG_PKT_LUT 8 -typedef struct csi_rx_fe_ctrl_state_s csi_rx_fe_ctrl_state_t; -typedef struct csi_rx_fe_ctrl_lane_s csi_rx_fe_ctrl_lane_t; -typedef struct csi_rx_be_ctrl_state_s csi_rx_be_ctrl_state_t; -/*mipi_backend_custom_mode_pixel_extraction_config*/ -typedef struct csi_rx_be_ctrl_pec_s csi_rx_be_ctrl_pec_t; - - -struct csi_rx_fe_ctrl_lane_s { - hrt_data termen; - hrt_data settle; -}; -struct csi_rx_fe_ctrl_state_s { - hrt_data enable; - hrt_data nof_enable_lanes; - hrt_data error_handling; - hrt_data status; - hrt_data status_dlane_hs; - hrt_data status_dlane_lp; - csi_rx_fe_ctrl_lane_t clane; - csi_rx_fe_ctrl_lane_t dlane[N_CSI_RX_DLANE_ID]; -}; -struct csi_rx_be_ctrl_state_s { - hrt_data enable; - hrt_data status; - hrt_data comp_format_reg[N_CSI_RX_BE_MIPI_COMP_FMT_REG]; - hrt_data raw16; - hrt_data raw18; - hrt_data force_raw8; - hrt_data irq_status; - hrt_data custom_mode_enable; - hrt_data custom_mode_data_state; - hrt_data pec[N_CSI_RX_BE_MIPI_CUSTOM_PEC]; - hrt_data custom_mode_valid_eop_config; - hrt_data global_lut_disregard_reg; - hrt_data packet_status_stall; - hrt_data short_packet_lut_entry[N_CSI_RX_BE_SHORT_PKT_LUT]; - hrt_data long_packet_lut_entry[N_CSI_RX_BE_LONG_PKT_LUT]; -}; -#endif /* __CSI_RX_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h deleted file mode 100644 index 9c0cb4a63862..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h +++ /dev/null @@ -1,282 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __CSI_RX_PRIVATE_H_INCLUDED__ -#define __CSI_RX_PRIVATE_H_INCLUDED__ - -#include "rx_csi_defs.h" -#include "mipi_backend_defs.h" -#include "csi_rx_public.h" - -#include "device_access.h" /* ia_css_device_load_uint32 */ - -#include "assert_support.h" /* assert */ -#include "print_support.h" /* print */ - - -/***************************************************** - * - * Native command interface (NCI). - * - *****************************************************/ -/** - * @brief Get the csi rx fe state. - * Refer to "csi_rx_public.h" for details. - */ -static inline void csi_rx_fe_ctrl_get_state( - const csi_rx_frontend_ID_t ID, - csi_rx_fe_ctrl_state_t *state) -{ - uint32_t i; - - state->enable = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ENABLE_REG_IDX); - state->nof_enable_lanes = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_NOF_ENABLED_LANES_REG_IDX); - state->error_handling = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ERROR_HANDLING_REG_IDX); - state->status = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_REG_IDX); - state->status_dlane_hs = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_DLANE_HS_REG_IDX); - state->status_dlane_lp = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_DLANE_LP_REG_IDX); - state->clane.termen = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_CLANE_REG_IDX); - state->clane.settle = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_CLANE_REG_IDX); - - /* - * Get the values of the register-set per - * dlane. - */ - for (i = 0; i < N_CSI_RX_FE_CTRL_DLANES[ID]; i++) { - csi_rx_fe_ctrl_get_dlane_state( - ID, - i, - &(state->dlane[i])); - } -} - -/** - * @brief Get the state of the csi rx fe dlane process. - * Refer to "csi_rx_public.h" for details. - */ -static inline void csi_rx_fe_ctrl_get_dlane_state( - const csi_rx_frontend_ID_t ID, - const uint32_t lane, - csi_rx_fe_ctrl_lane_t *dlane_state) -{ - - dlane_state->termen = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_DLANE_REG_IDX(lane)); - dlane_state->settle = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_DLANE_REG_IDX(lane)); - -} -/** - * @brief dump the csi rx fe state. - * Refer to "csi_rx_public.h" for details. - */ -static inline void csi_rx_fe_ctrl_dump_state( - const csi_rx_frontend_ID_t ID, - csi_rx_fe_ctrl_state_t *state) -{ - uint32_t i; - - ia_css_print("CSI RX FE STATE Controller %d Enable state 0x%x \n", ID, state->enable); - ia_css_print("CSI RX FE STATE Controller %d No Of enable lanes 0x%x \n", ID, state->nof_enable_lanes); - ia_css_print("CSI RX FE STATE Controller %d Error handling 0x%x \n", ID, state->error_handling); - ia_css_print("CSI RX FE STATE Controller %d Status 0x%x \n", ID, state->status); - ia_css_print("CSI RX FE STATE Controller %d Status Dlane HS 0x%x \n", ID, state->status_dlane_hs); - ia_css_print("CSI RX FE STATE Controller %d Status Dlane LP 0x%x \n", ID, state->status_dlane_lp); - ia_css_print("CSI RX FE STATE Controller %d Status term enable LP 0x%x \n", ID, state->clane.termen); - ia_css_print("CSI RX FE STATE Controller %d Status term settle LP 0x%x \n", ID, state->clane.settle); - - /* - * Get the values of the register-set per - * dlane. - */ - for (i = 0; i < N_CSI_RX_FE_CTRL_DLANES[ID]; i++) { - ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d termen 0x%x \n", ID, i, state->dlane[i].termen); - ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d settle 0x%x \n", ID, i, state->dlane[i].settle); - } -} - -/** - * @brief Get the csi rx be state. - * Refer to "csi_rx_public.h" for details. - */ -static inline void csi_rx_be_ctrl_get_state( - const csi_rx_backend_ID_t ID, - csi_rx_be_ctrl_state_t *state) -{ - uint32_t i; - - state->enable = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_ENABLE_REG_IDX); - - state->status = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_STATUS_REG_IDX); - - for(i = 0; i <N_CSI_RX_BE_MIPI_COMP_FMT_REG ; i++) { - state->comp_format_reg[i] = - csi_rx_be_ctrl_reg_load(ID, - _HRT_MIPI_BACKEND_COMP_FORMAT_REG0_IDX+i); - } - - state->raw16 = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_RAW16_CONFIG_REG_IDX); - - state->raw18 = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_RAW18_CONFIG_REG_IDX); - state->force_raw8 = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_FORCE_RAW8_REG_IDX); - state->irq_status = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_IRQ_STATUS_REG_IDX); -#if 0 /* device access error for these registers */ - /* ToDo: rootcause this failure */ - state->custom_mode_enable = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_EN_REG_IDX); - - state->custom_mode_data_state = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_DATA_STATE_REG_IDX); - for(i = 0; i <N_CSI_RX_BE_MIPI_CUSTOM_PEC ; i++) { - state->pec[i] = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P0_REG_IDX + i); - } - state->custom_mode_valid_eop_config = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_REG_IDX); -#endif - state->global_lut_disregard_reg = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_GLOBAL_LUT_DISREGARD_REG_IDX); - state->packet_status_stall = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_PKT_STALL_STATUS_REG_IDX); - /* - * Get the values of the register-set per - * lut. - */ - for (i = 0; i < N_SHORT_PACKET_LUT_ENTRIES[ID]; i++) { - state->short_packet_lut_entry[i] = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_SP_LUT_ENTRY_0_REG_IDX + i); - } - for (i = 0; i < N_LONG_PACKET_LUT_ENTRIES[ID]; i++) { - state->long_packet_lut_entry[i] = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_LP_LUT_ENTRY_0_REG_IDX + i); - } -} - -/** - * @brief Dump the csi rx be state. - * Refer to "csi_rx_public.h" for details. - */ -static inline void csi_rx_be_ctrl_dump_state( - const csi_rx_backend_ID_t ID, - csi_rx_be_ctrl_state_t *state) -{ - uint32_t i; - - ia_css_print("CSI RX BE STATE Controller %d Enable 0x%x \n", ID, state->enable); - ia_css_print("CSI RX BE STATE Controller %d Status 0x%x \n", ID, state->status); - - for(i = 0; i <N_CSI_RX_BE_MIPI_COMP_FMT_REG ; i++) { - ia_css_print("CSI RX BE STATE Controller %d comp format reg vc%d value 0x%x \n", ID, i, state->status); - } - ia_css_print("CSI RX BE STATE Controller %d RAW16 0x%x \n", ID, state->raw16); - ia_css_print("CSI RX BE STATE Controller %d RAW18 0x%x \n", ID, state->raw18); - ia_css_print("CSI RX BE STATE Controller %d Force RAW8 0x%x \n", ID, state->force_raw8); - ia_css_print("CSI RX BE STATE Controller %d IRQ state 0x%x \n", ID, state->irq_status); -#if 0 /* ToDo:Getting device access error for this register */ - for(i = 0; i <N_CSI_RX_BE_MIPI_CUSTOM_PEC ; i++) { - ia_css_print("CSI RX BE STATE Controller %d PEC ID %d custom pec 0x%x \n", ID, i, state->pec[i]); - } -#endif - ia_css_print("CSI RX BE STATE Controller %d Global LUT diregard reg 0x%x \n", ID, state->global_lut_disregard_reg); - ia_css_print("CSI RX BE STATE Controller %d packet stall reg 0x%x \n", ID, state->packet_status_stall); - /* - * Get the values of the register-set per - * lut. - */ - for (i = 0; i < N_SHORT_PACKET_LUT_ENTRIES[ID]; i++) { - ia_css_print("CSI RX BE STATE Controller ID %d Short packat entry %d shart packet lut id 0x%x \n", ID, i, state->short_packet_lut_entry[i]); - } - for (i = 0; i < N_LONG_PACKET_LUT_ENTRIES[ID]; i++) { - ia_css_print("CSI RX BE STATE Controller ID %d Long packat entry %d Long packet lut id 0x%x \n", ID, i, state->long_packet_lut_entry[i]); - } -} -/* end of NCI */ -/***************************************************** - * - * Device level interface (DLI). - * - *****************************************************/ -/** - * @brief Load the register value. - * Refer to "csi_rx_public.h" for details. - */ -static inline hrt_data csi_rx_fe_ctrl_reg_load( - const csi_rx_frontend_ID_t ID, - const hrt_address reg) -{ - assert(ID < N_CSI_RX_FRONTEND_ID); - assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg*sizeof(hrt_data)); -} - - -/** - * @brief Store a value to the register. - * Refer to "ibuf_ctrl_public.h" for details. - */ -static inline void csi_rx_fe_ctrl_reg_store( - const csi_rx_frontend_ID_t ID, - const hrt_address reg, - const hrt_data value) -{ - assert(ID < N_CSI_RX_FRONTEND_ID); - assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); - - ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); -} -/** - * @brief Load the register value. - * Refer to "csi_rx_public.h" for details. - */ -static inline hrt_data csi_rx_be_ctrl_reg_load( - const csi_rx_backend_ID_t ID, - const hrt_address reg) -{ - assert(ID < N_CSI_RX_BACKEND_ID); - assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg*sizeof(hrt_data)); -} - - -/** - * @brief Store a value to the register. - * Refer to "ibuf_ctrl_public.h" for details. - */ -static inline void csi_rx_be_ctrl_reg_store( - const csi_rx_backend_ID_t ID, - const hrt_address reg, - const hrt_data value) -{ - assert(ID < N_CSI_RX_BACKEND_ID); - assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); - - ia_css_device_store_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); -} -/* end of DLI */ - -#endif /* __CSI_RX_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl.c deleted file mode 100644 index 14973d1c2756..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl.c +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include <type_support.h> -#include "system_global.h" - -const uint32_t N_IBUF_CTRL_PROCS[N_IBUF_CTRL_ID] = { - 8, /* IBUF_CTRL0_ID supports at most 8 processes */ - 4, /* IBUF_CTRL1_ID supports at most 4 processes */ - 4 /* IBUF_CTRL2_ID supports at most 4 processes */ -}; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_local.h deleted file mode 100644 index ea40284623d1..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_local.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IBUF_CTRL_LOCAL_H_INCLUDED__ -#define __IBUF_CTRL_LOCAL_H_INCLUDED__ - -#include "ibuf_ctrl_global.h" - -typedef struct ibuf_ctrl_proc_state_s ibuf_ctrl_proc_state_t; -typedef struct ibuf_ctrl_state_s ibuf_ctrl_state_t; - -struct ibuf_ctrl_proc_state_s { - hrt_data num_items; - hrt_data num_stores; - hrt_data dma_channel; - hrt_data dma_command; - hrt_data ibuf_st_addr; - hrt_data ibuf_stride; - hrt_data ibuf_end_addr; - hrt_data dest_st_addr; - hrt_data dest_stride; - hrt_data dest_end_addr; - hrt_data sync_frame; - hrt_data sync_command; - hrt_data store_command; - hrt_data shift_returned_items; - hrt_data elems_ibuf; - hrt_data elems_dest; - hrt_data cur_stores; - hrt_data cur_acks; - hrt_data cur_s2m_ibuf_addr; - hrt_data cur_dma_ibuf_addr; - hrt_data cur_dma_dest_addr; - hrt_data cur_isp_dest_addr; - hrt_data dma_cmds_send; - hrt_data main_cntrl_state; - hrt_data dma_sync_state; - hrt_data isp_sync_state; -}; - -struct ibuf_ctrl_state_s { - hrt_data recalc_words; - hrt_data arbiters; - ibuf_ctrl_proc_state_t proc_state[N_STREAM2MMIO_SID_ID]; -}; - -#endif /* __IBUF_CTRL_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h deleted file mode 100644 index 4d07c2fe1469..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h +++ /dev/null @@ -1,233 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IBUF_CTRL_PRIVATE_H_INCLUDED__ -#define __IBUF_CTRL_PRIVATE_H_INCLUDED__ - -#include "ibuf_ctrl_public.h" - -#include "device_access.h" /* ia_css_device_load_uint32 */ - -#include "assert_support.h" /* assert */ -#include "print_support.h" /* print */ - - -/***************************************************** - * - * Native command interface (NCI). - * - *****************************************************/ -/** - * @brief Get the ibuf-controller state. - * Refer to "ibuf_ctrl_public.h" for details. - */ -STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state( - const ibuf_ctrl_ID_t ID, - ibuf_ctrl_state_t *state) -{ - uint32_t i; - - state->recalc_words = - ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_RECALC_WORDS_STATUS); - state->arbiters = - ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_ARBITERS_STATUS); - - /* - * Get the values of the register-set per - * ibuf-controller process. - */ - for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) { - ibuf_ctrl_get_proc_state( - ID, - i, - &(state->proc_state[i])); - } -} - -/** - * @brief Get the state of the ibuf-controller process. - * Refer to "ibuf_ctrl_public.h" for details. - */ -STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_proc_state( - const ibuf_ctrl_ID_t ID, - const uint32_t proc_id, - ibuf_ctrl_proc_state_t *state) -{ - hrt_address reg_bank_offset; - - reg_bank_offset = - _IBUF_CNTRL_PROC_REG_ALIGN * (1 + proc_id); - - state->num_items = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_ITEMS_PER_STORE); - - state->num_stores = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_STORES_PER_FRAME); - - state->dma_channel = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CHANNEL); - - state->dma_command = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CMD); - - state->ibuf_st_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_START_ADDRESS); - - state->ibuf_stride = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_STRIDE); - - state->ibuf_end_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_END_ADDRESS); - - state->dest_st_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_START_ADDRESS); - - state->dest_stride = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_STRIDE); - - state->dest_end_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_END_ADDRESS); - - state->sync_frame = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SYNC_FRAME); - - state->sync_command = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_SYNC_CMD); - - state->store_command = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_STORE_CMD); - - state->shift_returned_items = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SHIFT_ITEMS); - - state->elems_ibuf = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_IBUF); - - state->elems_dest = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_DEST); - - state->cur_stores = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_STORES); - - state->cur_acks = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ACKS); - - state->cur_s2m_ibuf_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_S2M_IBUF_ADDR); - - state->cur_dma_ibuf_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_IBUF_ADDR); - - state->cur_dma_dest_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_DEST_ADDR); - - state->cur_isp_dest_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ISP_DEST_ADDR); - - state->dma_cmds_send = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_NR_DMA_CMDS_SEND); - - state->main_cntrl_state = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_MAIN_CNTRL_STATE); - - state->dma_sync_state = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_SYNC_STATE); - - state->isp_sync_state = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ISP_SYNC_STATE); -} -/** - * @brief Dump the ibuf-controller state. - * Refer to "ibuf_ctrl_public.h" for details. - */ -STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_dump_state( - const ibuf_ctrl_ID_t ID, - ibuf_ctrl_state_t *state) -{ - uint32_t i; - ia_css_print("IBUF controller ID %d recalculate words 0x%x\n", ID, state->recalc_words); - ia_css_print("IBUF controller ID %d arbiters 0x%x\n", ID, state->arbiters); - - /* - * Dump the values of the register-set per - * ibuf-controller process. - */ - for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) { - ia_css_print("IBUF controller ID %d Process ID %d num_items 0x%x\n", ID, i, state->proc_state[i].num_items); - ia_css_print("IBUF controller ID %d Process ID %d num_stores 0x%x\n", ID, i, state->proc_state[i].num_stores); - ia_css_print("IBUF controller ID %d Process ID %d dma_channel 0x%x\n", ID, i, state->proc_state[i].dma_channel); - ia_css_print("IBUF controller ID %d Process ID %d dma_command 0x%x\n", ID, i, state->proc_state[i].dma_command); - ia_css_print("IBUF controller ID %d Process ID %d ibuf_st_addr 0x%x\n", ID, i, state->proc_state[i].ibuf_st_addr); - ia_css_print("IBUF controller ID %d Process ID %d ibuf_stride 0x%x\n", ID, i, state->proc_state[i].ibuf_stride); - ia_css_print("IBUF controller ID %d Process ID %d ibuf_end_addr 0x%x\n", ID, i, state->proc_state[i].ibuf_end_addr); - ia_css_print("IBUF controller ID %d Process ID %d dest_st_addr 0x%x\n", ID, i, state->proc_state[i].dest_st_addr); - ia_css_print("IBUF controller ID %d Process ID %d dest_stride 0x%x\n", ID, i, state->proc_state[i].dest_stride); - ia_css_print("IBUF controller ID %d Process ID %d dest_end_addr 0x%x\n", ID, i, state->proc_state[i].dest_end_addr); - ia_css_print("IBUF controller ID %d Process ID %d sync_frame 0x%x\n", ID, i, state->proc_state[i].sync_frame); - ia_css_print("IBUF controller ID %d Process ID %d sync_command 0x%x\n", ID, i, state->proc_state[i].sync_command); - ia_css_print("IBUF controller ID %d Process ID %d store_command 0x%x\n", ID, i, state->proc_state[i].store_command); - ia_css_print("IBUF controller ID %d Process ID %d shift_returned_items 0x%x\n", ID, i, state->proc_state[i].shift_returned_items); - ia_css_print("IBUF controller ID %d Process ID %d elems_ibuf 0x%x\n", ID, i, state->proc_state[i].elems_ibuf); - ia_css_print("IBUF controller ID %d Process ID %d elems_dest 0x%x\n", ID, i, state->proc_state[i].elems_dest); - ia_css_print("IBUF controller ID %d Process ID %d cur_stores 0x%x\n", ID, i, state->proc_state[i].cur_stores); - ia_css_print("IBUF controller ID %d Process ID %d cur_acks 0x%x\n", ID, i, state->proc_state[i].cur_acks); - ia_css_print("IBUF controller ID %d Process ID %d cur_s2m_ibuf_addr 0x%x\n", ID, i, state->proc_state[i].cur_s2m_ibuf_addr); - ia_css_print("IBUF controller ID %d Process ID %d cur_dma_ibuf_addr 0x%x\n", ID, i, state->proc_state[i].cur_dma_ibuf_addr); - ia_css_print("IBUF controller ID %d Process ID %d cur_dma_dest_addr 0x%x\n", ID, i, state->proc_state[i].cur_dma_dest_addr); - ia_css_print("IBUF controller ID %d Process ID %d cur_isp_dest_addr 0x%x\n", ID, i, state->proc_state[i].cur_isp_dest_addr); - ia_css_print("IBUF controller ID %d Process ID %d dma_cmds_send 0x%x\n", ID, i, state->proc_state[i].dma_cmds_send); - ia_css_print("IBUF controller ID %d Process ID %d main_cntrl_state 0x%x\n", ID, i, state->proc_state[i].main_cntrl_state); - ia_css_print("IBUF controller ID %d Process ID %d dma_sync_state 0x%x\n", ID, i, state->proc_state[i].dma_sync_state); - ia_css_print("IBUF controller ID %d Process ID %d isp_sync_state 0x%x\n", ID, i, state->proc_state[i].isp_sync_state); - } -} -/* end of NCI */ - -/***************************************************** - * - * Device level interface (DLI). - * - *****************************************************/ -/** - * @brief Load the register value. - * Refer to "ibuf_ctrl_public.h" for details. - */ -STORAGE_CLASS_IBUF_CTRL_C hrt_data ibuf_ctrl_reg_load( - const ibuf_ctrl_ID_t ID, - const hrt_address reg) -{ - assert(ID < N_IBUF_CTRL_ID); - assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(IBUF_CTRL_BASE[ID] + reg*sizeof(hrt_data)); -} - - -/** - * @brief Store a value to the register. - * Refer to "ibuf_ctrl_public.h" for details. - */ -STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_reg_store( - const ibuf_ctrl_ID_t ID, - const hrt_address reg, - const hrt_data value) -{ - assert(ID < N_IBUF_CTRL_ID); - assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); - - ia_css_device_store_uint32(IBUF_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); -} -/* end of DLI */ - - -#endif /* __IBUF_CTRL_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_local.h deleted file mode 100644 index f199423e28da..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_local.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __INPUT_SYSTEM_LOCAL_H_INCLUDED__ -#define __INPUT_SYSTEM_LOCAL_H_INCLUDED__ - -#include "type_support.h" -#include "input_system_global.h" - -#include "ibuf_ctrl.h" -#include "csi_rx.h" -#include "pixelgen.h" -#include "isys_stream2mmio.h" -#include "isys_irq.h" - -typedef input_system_err_t input_system_error_t; - -typedef enum { - MIPI_FORMAT_SHORT1 = 0x08, - MIPI_FORMAT_SHORT2, - MIPI_FORMAT_SHORT3, - MIPI_FORMAT_SHORT4, - MIPI_FORMAT_SHORT5, - MIPI_FORMAT_SHORT6, - MIPI_FORMAT_SHORT7, - MIPI_FORMAT_SHORT8, - MIPI_FORMAT_EMBEDDED = 0x12, - MIPI_FORMAT_YUV420_8 = 0x18, - MIPI_FORMAT_YUV420_10, - MIPI_FORMAT_YUV420_8_LEGACY, - MIPI_FORMAT_YUV420_8_SHIFT = 0x1C, - MIPI_FORMAT_YUV420_10_SHIFT, - MIPI_FORMAT_YUV422_8 = 0x1E, - MIPI_FORMAT_YUV422_10, - MIPI_FORMAT_RGB444 = 0x20, - MIPI_FORMAT_RGB555, - MIPI_FORMAT_RGB565, - MIPI_FORMAT_RGB666, - MIPI_FORMAT_RGB888, - MIPI_FORMAT_RAW6 = 0x28, - MIPI_FORMAT_RAW7, - MIPI_FORMAT_RAW8, - MIPI_FORMAT_RAW10, - MIPI_FORMAT_RAW12, - MIPI_FORMAT_RAW14, - MIPI_FORMAT_CUSTOM0 = 0x30, - MIPI_FORMAT_CUSTOM1, - MIPI_FORMAT_CUSTOM2, - MIPI_FORMAT_CUSTOM3, - MIPI_FORMAT_CUSTOM4, - MIPI_FORMAT_CUSTOM5, - MIPI_FORMAT_CUSTOM6, - MIPI_FORMAT_CUSTOM7, - //MIPI_FORMAT_RAW16, /*not supported by 2401*/ - //MIPI_FORMAT_RAW18, - N_MIPI_FORMAT -} mipi_format_t; - -#define N_MIPI_FORMAT_CUSTOM 8 - -/* The number of stores for compressed format types */ -#define N_MIPI_COMPRESSOR_CONTEXT (N_RX_CHANNEL_ID * N_MIPI_FORMAT_CUSTOM) -#define UNCOMPRESSED_BITS_PER_PIXEL_10 10 -#define UNCOMPRESSED_BITS_PER_PIXEL_12 12 -#define COMPRESSED_BITS_PER_PIXEL_6 6 -#define COMPRESSED_BITS_PER_PIXEL_7 7 -#define COMPRESSED_BITS_PER_PIXEL_8 8 -enum mipi_compressor { - MIPI_COMPRESSOR_NONE = 0, - MIPI_COMPRESSOR_10_6_10, - MIPI_COMPRESSOR_10_7_10, - MIPI_COMPRESSOR_10_8_10, - MIPI_COMPRESSOR_12_6_12, - MIPI_COMPRESSOR_12_7_12, - MIPI_COMPRESSOR_12_8_12, - N_MIPI_COMPRESSOR_METHODS -}; - -typedef enum { - MIPI_PREDICTOR_NONE = 0, - MIPI_PREDICTOR_TYPE1, - MIPI_PREDICTOR_TYPE2, - N_MIPI_PREDICTOR_TYPES -} mipi_predictor_t; - -typedef struct input_system_state_s input_system_state_t; -struct input_system_state_s { - ibuf_ctrl_state_t ibuf_ctrl_state[N_IBUF_CTRL_ID]; - csi_rx_fe_ctrl_state_t csi_rx_fe_ctrl_state[N_CSI_RX_FRONTEND_ID]; - csi_rx_be_ctrl_state_t csi_rx_be_ctrl_state[N_CSI_RX_BACKEND_ID]; - pixelgen_ctrl_state_t pixelgen_ctrl_state[N_PIXELGEN_ID]; - stream2mmio_state_t stream2mmio_state[N_STREAM2MMIO_ID]; - isys_irqc_state_t isys_irqc_state[N_ISYS_IRQ_ID]; -}; -#endif /* __INPUT_SYSTEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h deleted file mode 100644 index 97505e436047..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ -#define __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ - -#include "input_system_public.h" - -STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state( - const input_system_ID_t ID, - input_system_state_t *state) -{ - uint32_t i; - - (void)(ID); - - /* get the states of all CSI RX frontend devices */ - for (i = 0; i < N_CSI_RX_FRONTEND_ID; i++) { - csi_rx_fe_ctrl_get_state( - (csi_rx_frontend_ID_t)i, - &(state->csi_rx_fe_ctrl_state[i])); - } - - /* get the states of all CIS RX backend devices */ - for (i = 0; i < N_CSI_RX_BACKEND_ID; i++) { - csi_rx_be_ctrl_get_state( - (csi_rx_backend_ID_t)i, - &(state->csi_rx_be_ctrl_state[i])); - } - - /* get the states of all pixelgen devices */ - for (i = 0; i < N_PIXELGEN_ID; i++) { - pixelgen_ctrl_get_state( - (pixelgen_ID_t)i, - &(state->pixelgen_ctrl_state[i])); - } - - /* get the states of all stream2mmio devices */ - for (i = 0; i < N_STREAM2MMIO_ID; i++) { - stream2mmio_get_state( - (stream2mmio_ID_t)i, - &(state->stream2mmio_state[i])); - } - - /* get the states of all ibuf-controller devices */ - for (i = 0; i < N_IBUF_CTRL_ID; i++) { - ibuf_ctrl_get_state( - (ibuf_ctrl_ID_t)i, - &(state->ibuf_ctrl_state[i])); - } - - /* get the states of all isys irq controllers */ - for (i = 0; i < N_ISYS_IRQ_ID; i++) { - isys_irqc_state_get((isys_irq_ID_t)i, &(state->isys_irqc_state[i])); - } - - /* TODO: get the states of all ISYS2401 DMA devices */ - for (i = 0; i < N_ISYS2401_DMA_ID; i++) { - } - - return INPUT_SYSTEM_ERR_NO_ERROR; -} -STORAGE_CLASS_INPUT_SYSTEM_C void input_system_dump_state( - const input_system_ID_t ID, - input_system_state_t *state) -{ - uint32_t i; - - (void)(ID); - - /* dump the states of all CSI RX frontend devices */ - for (i = 0; i < N_CSI_RX_FRONTEND_ID; i++) { - csi_rx_fe_ctrl_dump_state( - (csi_rx_frontend_ID_t)i, - &(state->csi_rx_fe_ctrl_state[i])); - } - - /* dump the states of all CIS RX backend devices */ - for (i = 0; i < N_CSI_RX_BACKEND_ID; i++) { - csi_rx_be_ctrl_dump_state( - (csi_rx_backend_ID_t)i, - &(state->csi_rx_be_ctrl_state[i])); - } - - /* dump the states of all pixelgen devices */ - for (i = 0; i < N_PIXELGEN_ID; i++) { - pixelgen_ctrl_dump_state( - (pixelgen_ID_t)i, - &(state->pixelgen_ctrl_state[i])); - } - - /* dump the states of all st2mmio devices */ - for (i = 0; i < N_STREAM2MMIO_ID; i++) { - stream2mmio_dump_state( - (stream2mmio_ID_t)i, - &(state->stream2mmio_state[i])); - } - - /* dump the states of all ibuf-controller devices */ - for (i = 0; i < N_IBUF_CTRL_ID; i++) { - ibuf_ctrl_dump_state( - (ibuf_ctrl_ID_t)i, - &(state->ibuf_ctrl_state[i])); - } - - /* dump the states of all isys irq controllers */ - for (i = 0; i < N_ISYS_IRQ_ID; i++) { - isys_irqc_state_dump((isys_irq_ID_t)i, &(state->isys_irqc_state[i])); - } - - /* TODO: dump the states of all ISYS2401 DMA devices */ - for (i = 0; i < N_ISYS2401_DMA_ID; i++) { - } - - return; -} -#endif /* __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c deleted file mode 100644 index 77767228985e..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "isys_dma.h" -#include "assert_support.h" - -#ifndef __INLINE_ISYS2401_DMA__ -/* - * Include definitions for isys dma register access functions. isys_dma.h - * includes declarations of these functions by including isys_dma_public.h. - */ -#include "isys_dma_private.h" -#endif - -const isys2401_dma_channel N_ISYS2401_DMA_CHANNEL_PROCS[N_ISYS2401_DMA_ID] = { - N_ISYS2401_DMA_CHANNEL -}; - -void isys2401_dma_set_max_burst_size( - const isys2401_dma_ID_t dma_id, - uint32_t max_burst_size) -{ - assert(dma_id < N_ISYS2401_DMA_ID); - assert((max_burst_size > 0x00) && (max_burst_size <= 0xFF)); - - isys2401_dma_reg_store(dma_id, - DMA_DEV_INFO_REG_IDX(_DMA_V2_DEV_INTERF_MAX_BURST_IDX, HIVE_DMA_BUS_DDR_CONN), - (max_burst_size - 1)); -} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_local.h deleted file mode 100644 index 5c694a26386e..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_local.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __ISYS_DMA_LOCAL_H_INCLUDED__ -#define __ISYS_DMA_LOCAL_H_INCLUDED__ - -#include "isys_dma_global.h" - -#endif /* __ISYS_DMA_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h deleted file mode 100644 index 2cd1aeecf617..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __ISYS_DMA_PRIVATE_H_INCLUDED__ -#define __ISYS_DMA_PRIVATE_H_INCLUDED__ - -#include "isys_dma_public.h" -#include "device_access.h" -#include "assert_support.h" -#include "dma.h" -#include "dma_v2_defs.h" -#include "print_support.h" - - -STORAGE_CLASS_ISYS2401_DMA_C void isys2401_dma_reg_store( - const isys2401_dma_ID_t dma_id, - const unsigned int reg, - const hrt_data value) -{ - unsigned int reg_loc; - - assert(dma_id < N_ISYS2401_DMA_ID); - assert(ISYS2401_DMA_BASE[dma_id] != (hrt_address)-1); - - reg_loc = ISYS2401_DMA_BASE[dma_id] + (reg * sizeof(hrt_data)); - - ia_css_print("isys dma store at addr(0x%x) val(%u)\n", reg_loc, (unsigned int)value); - ia_css_device_store_uint32(reg_loc, value); -} - -STORAGE_CLASS_ISYS2401_DMA_C hrt_data isys2401_dma_reg_load( - const isys2401_dma_ID_t dma_id, - const unsigned int reg) -{ - unsigned int reg_loc; - hrt_data value; - - assert(dma_id < N_ISYS2401_DMA_ID); - assert(ISYS2401_DMA_BASE[dma_id] != (hrt_address)-1); - - reg_loc = ISYS2401_DMA_BASE[dma_id] + (reg * sizeof(hrt_data)); - - value = ia_css_device_load_uint32(reg_loc); - ia_css_print("isys dma load from addr(0x%x) val(%u)\n", reg_loc, (unsigned int)value); - - return value; -} - -#endif /* __ISYS_DMA_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c deleted file mode 100644 index 842ae340ae13..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include <system_local.h> -#include "device_access.h" -#include "assert_support.h" -#include "ia_css_debug.h" -#include "isys_irq.h" - -#ifndef __INLINE_ISYS2401_IRQ__ -/* - * Include definitions for isys irq private functions. isys_irq.h includes - * declarations of these functions by including isys_irq_public.h. - */ -#include "isys_irq_private.h" -#endif - -/* Public interface */ -STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_status_enable( - const isys_irq_ID_t isys_irqc_id) -{ - assert(isys_irqc_id < N_ISYS_IRQ_ID); - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Setting irq mask for port %u\n", isys_irqc_id); - isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_MASK_REG_IDX, ISYS_IRQ_MASK_REG_VALUE); - isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_CLEAR_REG_IDX, ISYS_IRQ_CLEAR_REG_VALUE); - isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_ENABLE_REG_IDX, ISYS_IRQ_ENABLE_REG_VALUE); -} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h deleted file mode 100644 index 0bffb5680e25..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __ISYS_IRQ_LOCAL_H__ -#define __ISYS_IRQ_LOCAL_H__ - -#include <type_support.h> - -#if defined(USE_INPUT_SYSTEM_VERSION_2401) - -typedef struct isys_irqc_state_s isys_irqc_state_t; - -struct isys_irqc_state_s { - hrt_data edge; - hrt_data mask; - hrt_data status; - hrt_data enable; - hrt_data level_no; -/*hrt_data clear; */ /* write-only register */ -}; - -#endif /* defined(USE_INPUT_SYSTEM_VERSION_2401) */ - -#endif /* __ISYS_IRQ_LOCAL_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h deleted file mode 100644 index e69f39893bd2..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __ISYS_IRQ_PRIVATE_H__ -#define __ISYS_IRQ_PRIVATE_H__ - -#include "isys_irq_global.h" -#include "isys_irq_local.h" - -#if defined(USE_INPUT_SYSTEM_VERSION_2401) - -/* -------------------------------------------------------+ - | Native command interface (NCI) | - + -------------------------------------------------------*/ - -/** -* @brief Get the isys irq status. -* Refer to "isys_irq.h" for details. -*/ -STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_get( - const isys_irq_ID_t isys_irqc_id, - isys_irqc_state_t *state) -{ - state->edge = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_EDGE_REG_IDX); - state->mask = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_MASK_REG_IDX); - state->status = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_STATUS_REG_IDX); - state->enable = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_ENABLE_REG_IDX); - state->level_no = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_LEVEL_NO_REG_IDX); - /* - ** Invalid to read/load from write-only register 'clear' - ** state->clear = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_CLEAR_REG_IDX); - */ -} - -/** -* @brief Dump the isys irq status. -* Refer to "isys_irq.h" for details. -*/ -STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_dump( - const isys_irq_ID_t isys_irqc_id, - const isys_irqc_state_t *state) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "isys irq controller id %d" - "\n\tstatus:0x%x\n\tedge:0x%x\n\tmask:0x%x" - "\n\tenable:0x%x\n\tlevel_not_pulse:0x%x\n", - isys_irqc_id, - state->status, state->edge, state->mask, state->enable, state->level_no); -} - -/* end of NCI */ - -/* -------------------------------------------------------+ - | Device level interface (DLI) | - + -------------------------------------------------------*/ - -/* Support functions */ -STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_reg_store( - const isys_irq_ID_t isys_irqc_id, - const unsigned int reg_idx, - const hrt_data value) -{ - unsigned int reg_addr; - - assert(isys_irqc_id < N_ISYS_IRQ_ID); - assert(reg_idx <= ISYS_IRQ_LEVEL_NO_REG_IDX); - - reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data)); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "isys irq store at addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value); - - ia_css_device_store_uint32(reg_addr, value); -} - -STORAGE_CLASS_ISYS2401_IRQ_C hrt_data isys_irqc_reg_load( - const isys_irq_ID_t isys_irqc_id, - const unsigned int reg_idx) -{ - unsigned int reg_addr; - hrt_data value; - - assert(isys_irqc_id < N_ISYS_IRQ_ID); - assert(reg_idx <= ISYS_IRQ_LEVEL_NO_REG_IDX); - - reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data)); - value = ia_css_device_load_uint32(reg_addr); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "isys irq load from addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value); - - return value; -} - -/* end of DLI */ - -#endif /* defined(USE_INPUT_SYSTEM_VERSION_2401) */ - -#endif /* __ISYS_IRQ_PRIVATE_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio.c deleted file mode 100644 index 67570138ba24..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio.c +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "isys_stream2mmio.h" - -const stream2mmio_sid_ID_t N_STREAM2MMIO_SID_PROCS[N_STREAM2MMIO_ID] = { - N_STREAM2MMIO_SID_ID, - STREAM2MMIO_SID4_ID, - STREAM2MMIO_SID4_ID -}; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_local.h deleted file mode 100644 index 801523977e1d..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_local.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __ISYS_STREAM2MMIO_LOCAL_H_INCLUDED__ -#define __ISYS_STREAM2MMIO_LOCAL_H_INCLUDED__ - -#include "isys_stream2mmio_global.h" - -typedef struct stream2mmio_state_s stream2mmio_state_t; -typedef struct stream2mmio_sid_state_s stream2mmio_sid_state_t; - -struct stream2mmio_sid_state_s { - hrt_data rcv_ack; - hrt_data pix_width_id; - hrt_data start_addr; - hrt_data end_addr; - hrt_data strides; - hrt_data num_items; - hrt_data block_when_no_cmd; -}; - -struct stream2mmio_state_s { - stream2mmio_sid_state_t sid_state[N_STREAM2MMIO_SID_ID]; -}; -#endif /* __ISYS_STREAM2MMIO_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h deleted file mode 100644 index f946105ddf43..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h +++ /dev/null @@ -1,168 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __ISYS_STREAM2MMIO_PRIVATE_H_INCLUDED__ -#define __ISYS_STREAM2MMIO_PRIVATE_H_INCLUDED__ - -#include "isys_stream2mmio_public.h" -#include "device_access.h" /* ia_css_device_load_uint32 */ -#include "assert_support.h" /* assert */ -#include "print_support.h" /* print */ - -#define STREAM2MMIO_COMMAND_REG_ID 0 -#define STREAM2MMIO_ACKNOWLEDGE_REG_ID 1 -#define STREAM2MMIO_PIX_WIDTH_ID_REG_ID 2 -#define STREAM2MMIO_START_ADDR_REG_ID 3 /* master port address,NOT Byte */ -#define STREAM2MMIO_END_ADDR_REG_ID 4 /* master port address,NOT Byte */ -#define STREAM2MMIO_STRIDE_REG_ID 5 /* stride in master port words, increment is per packet for long sids, stride is not used for short sid's*/ -#define STREAM2MMIO_NUM_ITEMS_REG_ID 6 /* number of packets for store packets cmd, number of words for store_words cmd */ -#define STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID 7 /* if this register is 1, input will be stalled if there is no pending command for this sid */ -#define STREAM2MMIO_REGS_PER_SID 8 - -/***************************************************** - * - * Native command interface (NCI). - * - *****************************************************/ -/** - * @brief Get the stream2mmio-controller state. - * Refer to "stream2mmio_public.h" for details. - */ -STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_state( - const stream2mmio_ID_t ID, - stream2mmio_state_t *state) -{ - stream2mmio_sid_ID_t i; - - /* - * Get the values of the register-set per - * stream2mmio-controller sids. - */ - for (i = STREAM2MMIO_SID0_ID; i < N_STREAM2MMIO_SID_PROCS[ID]; i++) { - stream2mmio_get_sid_state(ID, i, &(state->sid_state[i])); - } -} - -/** - * @brief Get the state of the stream2mmio-controller sidess. - * Refer to "stream2mmio_public.h" for details. - */ -STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_sid_state( - const stream2mmio_ID_t ID, - const stream2mmio_sid_ID_t sid_id, - stream2mmio_sid_state_t *state) -{ - - state->rcv_ack = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_ACKNOWLEDGE_REG_ID); - - state->pix_width_id = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_PIX_WIDTH_ID_REG_ID); - - state->start_addr = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_START_ADDR_REG_ID); - - state->end_addr = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_END_ADDR_REG_ID); - - state->strides = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_STRIDE_REG_ID); - - state->num_items = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_NUM_ITEMS_REG_ID); - - state->block_when_no_cmd = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID); - -} - -/** - * @brief Dump the state of the stream2mmio-controller sidess. - * Refer to "stream2mmio_public.h" for details. - */ -STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_print_sid_state( - stream2mmio_sid_state_t *state) -{ - ia_css_print("\t \t Receive acks 0x%x\n", state->rcv_ack); - ia_css_print("\t \t Pixel width 0x%x\n", state->pix_width_id); - ia_css_print("\t \t Startaddr 0x%x\n", state->start_addr); - ia_css_print("\t \t Endaddr 0x%x\n", state->end_addr); - ia_css_print("\t \t Strides 0x%x\n", state->strides); - ia_css_print("\t \t Num Items 0x%x\n", state->num_items); - ia_css_print("\t \t block when no cmd 0x%x\n", state->block_when_no_cmd); - -} -/** - * @brief Dump the ibuf-controller state. - * Refer to "stream2mmio_public.h" for details. - */ -STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_dump_state( - const stream2mmio_ID_t ID, - stream2mmio_state_t *state) -{ - stream2mmio_sid_ID_t i; - - /* - * Get the values of the register-set per - * stream2mmio-controller sids. - */ - for (i = STREAM2MMIO_SID0_ID; i < N_STREAM2MMIO_SID_PROCS[ID]; i++) { - ia_css_print("StREAM2MMIO ID %d SID %d\n", ID, i); - stream2mmio_print_sid_state(&(state->sid_state[i])); - } -} -/* end of NCI */ - -/***************************************************** - * - * Device level interface (DLI). - * - *****************************************************/ -/** - * @brief Load the register value. - * Refer to "stream2mmio_public.h" for details. - */ -STORAGE_CLASS_STREAM2MMIO_C hrt_data stream2mmio_reg_load( - const stream2mmio_ID_t ID, - const stream2mmio_sid_ID_t sid_id, - const uint32_t reg_idx) -{ - uint32_t reg_bank_offset; - - assert(ID < N_STREAM2MMIO_ID); - - reg_bank_offset = STREAM2MMIO_REGS_PER_SID * sid_id; - return ia_css_device_load_uint32(STREAM2MMIO_CTRL_BASE[ID] + - (reg_bank_offset + reg_idx) * sizeof(hrt_data)); -} - - -/** - * @brief Store a value to the register. - * Refer to "stream2mmio_public.h" for details. - */ -STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_reg_store( - const stream2mmio_ID_t ID, - const hrt_address reg, - const hrt_data value) -{ - assert(ID < N_STREAM2MMIO_ID); - assert(STREAM2MMIO_CTRL_BASE[ID] != (hrt_address)-1); - - ia_css_device_store_uint32(STREAM2MMIO_CTRL_BASE[ID] + - reg * sizeof(hrt_data), value); -} -/* end of DLI */ - -#endif /* __ISYS_STREAM2MMIO_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_local.h deleted file mode 100644 index 24f4da9aef40..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_local.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __PIXELGEN_LOCAL_H_INCLUDED__ -#define __PIXELGEN_LOCAL_H_INCLUDED__ - -#include "pixelgen_global.h" - -typedef struct pixelgen_ctrl_state_s pixelgen_ctrl_state_t; -struct pixelgen_ctrl_state_s { - hrt_data com_enable; - hrt_data prbs_rstval0; - hrt_data prbs_rstval1; - hrt_data syng_sid; - hrt_data syng_free_run; - hrt_data syng_pause; - hrt_data syng_nof_frames; - hrt_data syng_nof_pixels; - hrt_data syng_nof_line; - hrt_data syng_hblank_cyc; - hrt_data syng_vblank_cyc; - hrt_data syng_stat_hcnt; - hrt_data syng_stat_vcnt; - hrt_data syng_stat_fcnt; - hrt_data syng_stat_done; - hrt_data tpg_mode; - hrt_data tpg_hcnt_mask; - hrt_data tpg_vcnt_mask; - hrt_data tpg_xycnt_mask; - hrt_data tpg_hcnt_delta; - hrt_data tpg_vcnt_delta; - hrt_data tpg_r1; - hrt_data tpg_g1; - hrt_data tpg_b1; - hrt_data tpg_r2; - hrt_data tpg_g2; - hrt_data tpg_b2; -}; -#endif /* __PIXELGEN_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h deleted file mode 100644 index c5bf540eadf1..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h +++ /dev/null @@ -1,164 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __PIXELGEN_PRIVATE_H_INCLUDED__ -#define __PIXELGEN_PRIVATE_H_INCLUDED__ -#include "pixelgen_public.h" -#include "hive_isp_css_host_ids_hrt.h" -#include "PixelGen_SysBlock_defs.h" -#include "device_access.h" /* ia_css_device_load_uint32 */ -#include "assert_support.h" /* assert */ - - -/***************************************************** - * - * Native command interface (NCI). - * - *****************************************************/ -/** - * @brief Get the pixelgen state. - * Refer to "pixelgen_public.h" for details. - */ -STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_get_state( - const pixelgen_ID_t ID, - pixelgen_ctrl_state_t *state) -{ - - state->com_enable = - pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_IDX); - state->prbs_rstval0 = - pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG0_IDX); - state->prbs_rstval1 = - pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG1_IDX); - state->syng_sid = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_SID_REG_IDX); - state->syng_free_run = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_FREE_RUN_REG_IDX); - state->syng_pause = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_PAUSE_REG_IDX); - state->syng_nof_frames = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_FRAME_REG_IDX); - state->syng_nof_pixels = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_PIXEL_REG_IDX); - state->syng_nof_line = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_LINE_REG_IDX); - state->syng_hblank_cyc = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_HBLANK_CYC_REG_IDX); - state->syng_vblank_cyc = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_VBLANK_CYC_REG_IDX); - state->syng_stat_hcnt = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_HCNT_REG_IDX); - state->syng_stat_vcnt = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_VCNT_REG_IDX); - state->syng_stat_fcnt = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_FCNT_REG_IDX); - state->syng_stat_done = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_DONE_REG_IDX); - state->tpg_mode = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_MODE_REG_IDX); - state->tpg_hcnt_mask = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_MASK_REG_IDX); - state->tpg_vcnt_mask = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_MASK_REG_IDX); - state->tpg_xycnt_mask = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_XYCNT_MASK_REG_IDX); - state->tpg_hcnt_delta = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_DELTA_REG_IDX); - state->tpg_vcnt_delta = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_DELTA_REG_IDX); - state->tpg_r1 = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_R1_REG_IDX); - state->tpg_g1 = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_G1_REG_IDX); - state->tpg_b1 = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_B1_REG_IDX); - state->tpg_r2 = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_R2_REG_IDX); - state->tpg_g2 = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_G2_REG_IDX); - state->tpg_b2 = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_B2_REG_IDX); -} -/** - * @brief Dump the pixelgen state. - * Refer to "pixelgen_public.h" for details. - */ -STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_dump_state( - const pixelgen_ID_t ID, - pixelgen_ctrl_state_t *state) -{ - ia_css_print("Pixel Generator ID %d Enable 0x%x \n", ID, state->com_enable); - ia_css_print("Pixel Generator ID %d PRBS reset vlue 0 0x%x \n", ID, state->prbs_rstval0); - ia_css_print("Pixel Generator ID %d PRBS reset vlue 1 0x%x \n", ID, state->prbs_rstval1); - ia_css_print("Pixel Generator ID %d SYNC SID 0x%x \n", ID, state->syng_sid); - ia_css_print("Pixel Generator ID %d syng free run 0x%x \n", ID, state->syng_free_run); - ia_css_print("Pixel Generator ID %d syng pause 0x%x \n", ID, state->syng_pause); - ia_css_print("Pixel Generator ID %d syng no of frames 0x%x \n", ID, state->syng_nof_frames); - ia_css_print("Pixel Generator ID %d syng no of pixels 0x%x \n", ID, state->syng_nof_pixels); - ia_css_print("Pixel Generator ID %d syng no of line 0x%x \n", ID, state->syng_nof_line); - ia_css_print("Pixel Generator ID %d syng hblank cyc 0x%x \n", ID, state->syng_hblank_cyc); - ia_css_print("Pixel Generator ID %d syng vblank cyc 0x%x \n", ID, state->syng_vblank_cyc); - ia_css_print("Pixel Generator ID %d syng stat hcnt 0x%x \n", ID, state->syng_stat_hcnt); - ia_css_print("Pixel Generator ID %d syng stat vcnt 0x%x \n", ID, state->syng_stat_vcnt); - ia_css_print("Pixel Generator ID %d syng stat fcnt 0x%x \n", ID, state->syng_stat_fcnt); - ia_css_print("Pixel Generator ID %d syng stat done 0x%x \n", ID, state->syng_stat_done); - ia_css_print("Pixel Generator ID %d tpg modee 0x%x \n", ID, state->tpg_mode); - ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x \n", ID, state->tpg_hcnt_mask); - ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x \n", ID, state->tpg_hcnt_mask); - ia_css_print("Pixel Generator ID %d tpg xycnt mask 0x%x \n", ID, state->tpg_xycnt_mask); - ia_css_print("Pixel Generator ID %d tpg hcnt delta 0x%x \n", ID, state->tpg_hcnt_delta); - ia_css_print("Pixel Generator ID %d tpg vcnt delta 0x%x \n", ID, state->tpg_vcnt_delta); - ia_css_print("Pixel Generator ID %d tpg r1 0x%x \n", ID, state->tpg_r1); - ia_css_print("Pixel Generator ID %d tpg g1 0x%x \n", ID, state->tpg_g1); - ia_css_print("Pixel Generator ID %d tpg b1 0x%x \n", ID, state->tpg_b1); - ia_css_print("Pixel Generator ID %d tpg r2 0x%x \n", ID, state->tpg_r2); - ia_css_print("Pixel Generator ID %d tpg g2 0x%x \n", ID, state->tpg_g2); - ia_css_print("Pixel Generator ID %d tpg b2 0x%x \n", ID, state->tpg_b2); -} -/* end of NCI */ -/***************************************************** - * - * Device level interface (DLI). - * - *****************************************************/ -/** - * @brief Load the register value. - * Refer to "pixelgen_public.h" for details. - */ -STORAGE_CLASS_PIXELGEN_C hrt_data pixelgen_ctrl_reg_load( - const pixelgen_ID_t ID, - const hrt_address reg) -{ - assert(ID < N_PIXELGEN_ID); - assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg*sizeof(hrt_data)); -} - - -/** - * @brief Store a value to the register. - * Refer to "pixelgen_ctrl_public.h" for details. - */ -STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_reg_store( - const pixelgen_ID_t ID, - const hrt_address reg, - const hrt_data value) -{ - assert(ID < N_PIXELGEN_ID); - assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1); - - ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); -} -/* end of DLI */ -#endif /* __PIXELGEN_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h deleted file mode 100644 index c16670989702..000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h +++ /dev/null @@ -1,381 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __SYSTEM_LOCAL_H_INCLUDED__ -#define __SYSTEM_LOCAL_H_INCLUDED__ - -#ifdef HRT_ISP_CSS_CUSTOM_HOST -#ifndef HRT_USE_VIR_ADDRS -#define HRT_USE_VIR_ADDRS -#endif -/* This interface is deprecated */ -/*#include "hive_isp_css_custom_host_hrt.h"*/ -#endif - -#include "system_global.h" - -#ifdef __FIST__ -#define HRT_ADDRESS_WIDTH 32 /* Surprise, this is a local property and even differs per platform */ -#else -#define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property */ -#endif - -#if !defined(__KERNEL__) || (1 == 1) -/* This interface is deprecated */ -#include "hrt/hive_types.h" -#else /* __KERNEL__ */ -#include <type_support.h> - -#if HRT_ADDRESS_WIDTH == 64 -typedef uint64_t hrt_address; -#elif HRT_ADDRESS_WIDTH == 32 -typedef uint32_t hrt_address; -#else -#error "system_local.h: HRT_ADDRESS_WIDTH must be one of {32,64}" -#endif - -typedef uint32_t hrt_vaddress; -typedef uint32_t hrt_data; -#endif /* __KERNEL__ */ - -/* - * Cell specific address maps - */ -#if HRT_ADDRESS_WIDTH == 64 - -#define GP_FIFO_BASE ((hrt_address)0x0000000000090104) /* This is NOT a base address */ - -/* DDR */ -static const hrt_address DDR_BASE[N_DDR_ID] = { - 0x0000000120000000ULL}; - -/* ISP */ -static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = { - 0x0000000000020000ULL}; - -static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = { - 0x0000000000200000ULL}; - -static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = { - 0x0000000000100000ULL}; - -static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = { - 0x00000000001C0000ULL, - 0x00000000001D0000ULL, - 0x00000000001E0000ULL}; - -static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = { - 0x00000000001F0000ULL}; - -/* SP */ -static const hrt_address SP_CTRL_BASE[N_SP_ID] = { - 0x0000000000010000ULL}; - -static const hrt_address SP_DMEM_BASE[N_SP_ID] = { - 0x0000000000300000ULL}; - -/* MMU */ -#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) || defined(IS_ISP_2401_MAMOIADA_SYSTEM) -/* - * MMU0_ID: The data MMU - * MMU1_ID: The icache MMU - */ -static const hrt_address MMU_BASE[N_MMU_ID] = { - 0x0000000000070000ULL, - 0x00000000000A0000ULL}; -#else -#error "system_local.h: SYSTEM must be one of {2400, 2401 }" -#endif - -/* DMA */ -static const hrt_address DMA_BASE[N_DMA_ID] = { - 0x0000000000040000ULL}; - -static const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = { - 0x00000000000CA000ULL}; - -/* IRQ */ -static const hrt_address IRQ_BASE[N_IRQ_ID] = { - 0x0000000000000500ULL, - 0x0000000000030A00ULL, - 0x000000000008C000ULL, - 0x0000000000090200ULL}; -/* - 0x0000000000000500ULL}; - */ - -/* GDC */ -static const hrt_address GDC_BASE[N_GDC_ID] = { - 0x0000000000050000ULL, - 0x0000000000060000ULL}; - -/* FIFO_MONITOR (not a subset of GP_DEVICE) */ -static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = { - 0x0000000000000000ULL}; - -/* -static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = { - 0x0000000000000000ULL}; - -static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { - 0x0000000000090000ULL}; -*/ - -/* GP_DEVICE (single base for all separate GP_REG instances) */ -static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { - 0x0000000000000000ULL}; - -/*GP TIMER , all timer registers are inter-twined, - * so, having multiple base addresses for - * different timers does not help*/ -static const hrt_address GP_TIMER_BASE = - (hrt_address)0x0000000000000600ULL; - -/* GPIO */ -static const hrt_address GPIO_BASE[N_GPIO_ID] = { - 0x0000000000000400ULL}; - -/* TIMED_CTRL */ -static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { - 0x0000000000000100ULL}; - - -/* INPUT_FORMATTER */ -static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { - 0x0000000000030000ULL, - 0x0000000000030200ULL, - 0x0000000000030400ULL, - 0x0000000000030600ULL}; /* memcpy() */ - -/* INPUT_SYSTEM */ -static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { - 0x0000000000080000ULL}; -/* 0x0000000000081000ULL, */ /* capture A */ -/* 0x0000000000082000ULL, */ /* capture B */ -/* 0x0000000000083000ULL, */ /* capture C */ -/* 0x0000000000084000ULL, */ /* Acquisition */ -/* 0x0000000000085000ULL, */ /* DMA */ -/* 0x0000000000089000ULL, */ /* ctrl */ -/* 0x000000000008A000ULL, */ /* GP regs */ -/* 0x000000000008B000ULL, */ /* FIFO */ -/* 0x000000000008C000ULL, */ /* IRQ */ - -/* RX, the MIPI lane control regs start at offset 0 */ -static const hrt_address RX_BASE[N_RX_ID] = { - 0x0000000000080100ULL}; - -/* IBUF_CTRL, part of the Input System 2401 */ -static const hrt_address IBUF_CTRL_BASE[N_IBUF_CTRL_ID] = { - 0x00000000000C1800ULL, /* ibuf controller A */ - 0x00000000000C3800ULL, /* ibuf controller B */ - 0x00000000000C5800ULL /* ibuf controller C */ -}; - -/* ISYS IRQ Controllers, part of the Input System 2401 */ -static const hrt_address ISYS_IRQ_BASE[N_ISYS_IRQ_ID] = { - 0x00000000000C1400ULL, /* port a */ - 0x00000000000C3400ULL, /* port b */ - 0x00000000000C5400ULL /* port c */ -}; - -/* CSI FE, part of the Input System 2401 */ -static const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_FRONTEND_ID] = { - 0x00000000000C0400ULL, /* csi fe controller A */ - 0x00000000000C2400ULL, /* csi fe controller B */ - 0x00000000000C4400ULL /* csi fe controller C */ -}; -/* CSI BE, part of the Input System 2401 */ -static const hrt_address CSI_RX_BE_CTRL_BASE[N_CSI_RX_BACKEND_ID] = { - 0x00000000000C0800ULL, /* csi be controller A */ - 0x00000000000C2800ULL, /* csi be controller B */ - 0x00000000000C4800ULL /* csi be controller C */ -}; -/* PIXEL Generator, part of the Input System 2401 */ -static const hrt_address PIXELGEN_CTRL_BASE[N_PIXELGEN_ID] = { - 0x00000000000C1000ULL, /* pixel gen controller A */ - 0x00000000000C3000ULL, /* pixel gen controller B */ - 0x00000000000C5000ULL /* pixel gen controller C */ -}; -/* Stream2MMIO, part of the Input System 2401 */ -static const hrt_address STREAM2MMIO_CTRL_BASE[N_STREAM2MMIO_ID] = { - 0x00000000000C0C00ULL, /* stream2mmio controller A */ - 0x00000000000C2C00ULL, /* stream2mmio controller B */ - 0x00000000000C4C00ULL /* stream2mmio controller C */ -}; -#elif HRT_ADDRESS_WIDTH == 32 - -#define GP_FIFO_BASE ((hrt_address)0x00090104) /* This is NOT a base address */ - -/* DDR : Attention, this value not defined in 32-bit */ -static const hrt_address DDR_BASE[N_DDR_ID] = { - 0x00000000UL}; - -/* ISP */ -static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = { - 0x00020000UL}; - -static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = { - 0xffffffffUL}; - -static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = { - 0xffffffffUL}; - -static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = { - 0xffffffffUL, - 0xffffffffUL, - 0xffffffffUL}; - -static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = { - 0xffffffffUL}; - -/* SP */ -static const hrt_address SP_CTRL_BASE[N_SP_ID] = { - 0x00010000UL}; - -static const hrt_address SP_DMEM_BASE[N_SP_ID] = { - 0x00300000UL}; - -/* MMU */ -#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) || defined(IS_ISP_2401_MAMOIADA_SYSTEM) -/* - * MMU0_ID: The data MMU - * MMU1_ID: The icache MMU - */ -static const hrt_address MMU_BASE[N_MMU_ID] = { - 0x00070000UL, - 0x000A0000UL}; -#else -#error "system_local.h: SYSTEM must be one of {2400, 2401 }" -#endif - -/* DMA */ -static const hrt_address DMA_BASE[N_DMA_ID] = { - 0x00040000UL}; - -static const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = { - 0x000CA000UL}; - -/* IRQ */ -static const hrt_address IRQ_BASE[N_IRQ_ID] = { - 0x00000500UL, - 0x00030A00UL, - 0x0008C000UL, - 0x00090200UL}; -/* - 0x00000500UL}; - */ - -/* GDC */ -static const hrt_address GDC_BASE[N_GDC_ID] = { - 0x00050000UL, - 0x00060000UL}; - -/* FIFO_MONITOR (not a subset of GP_DEVICE) */ -static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = { - 0x00000000UL}; - -/* -static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = { - 0x00000000UL}; - -static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { - 0x00090000UL}; -*/ - -/* GP_DEVICE (single base for all separate GP_REG instances) */ -static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { - 0x00000000UL}; - -/*GP TIMER , all timer registers are inter-twined, - * so, having multiple base addresses for - * different timers does not help*/ -static const hrt_address GP_TIMER_BASE = - (hrt_address)0x00000600UL; -/* GPIO */ -static const hrt_address GPIO_BASE[N_GPIO_ID] = { - 0x00000400UL}; - -/* TIMED_CTRL */ -static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { - 0x00000100UL}; - - -/* INPUT_FORMATTER */ -static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { - 0x00030000UL, - 0x00030200UL, - 0x00030400UL}; -/* 0x00030600UL, */ /* memcpy() */ - -/* INPUT_SYSTEM */ -static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { - 0x00080000UL}; -/* 0x00081000UL, */ /* capture A */ -/* 0x00082000UL, */ /* capture B */ -/* 0x00083000UL, */ /* capture C */ -/* 0x00084000UL, */ /* Acquisition */ -/* 0x00085000UL, */ /* DMA */ -/* 0x00089000UL, */ /* ctrl */ -/* 0x0008A000UL, */ /* GP regs */ -/* 0x0008B000UL, */ /* FIFO */ -/* 0x0008C000UL, */ /* IRQ */ - -/* RX, the MIPI lane control regs start at offset 0 */ -static const hrt_address RX_BASE[N_RX_ID] = { - 0x00080100UL}; - -/* IBUF_CTRL, part of the Input System 2401 */ -static const hrt_address IBUF_CTRL_BASE[N_IBUF_CTRL_ID] = { - 0x000C1800UL, /* ibuf controller A */ - 0x000C3800UL, /* ibuf controller B */ - 0x000C5800UL /* ibuf controller C */ -}; - -/* ISYS IRQ Controllers, part of the Input System 2401 */ -static const hrt_address ISYS_IRQ_BASE[N_ISYS_IRQ_ID] = { - 0x000C1400ULL, /* port a */ - 0x000C3400ULL, /* port b */ - 0x000C5400ULL /* port c */ -}; - -/* CSI FE, part of the Input System 2401 */ -static const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_FRONTEND_ID] = { - 0x000C0400UL, /* csi fe controller A */ - 0x000C2400UL, /* csi fe controller B */ - 0x000C4400UL /* csi fe controller C */ -}; -/* CSI BE, part of the Input System 2401 */ -static const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_BACKEND_ID] = { - 0x000C0800UL, /* csi be controller A */ - 0x000C2800UL, /* csi be controller B */ - 0x000C4800UL /* csi be controller C */ -}; -/* PIXEL Generator, part of the Input System 2401 */ -static const hrt_address PIXELGEN_CTRL_BASE[N_PIXELGEN_ID] = { - 0x000C1000UL, /* pixel gen controller A */ - 0x000C3000UL, /* pixel gen controller B */ - 0x000C5000UL /* pixel gen controller C */ -}; -/* Stream2MMIO, part of the Input System 2401 */ -static const hrt_address STREAM2MMIO_CTRL_BASE[N_STREAM2MMIO_ID] = { - 0x000C0C00UL, /* stream2mmio controller A */ - 0x000C2C00UL, /* stream2mmio controller B */ - 0x000C4C00UL /* stream2mmio controller C */ -}; - -#else -#error "system_local.h: HRT_ADDRESS_WIDTH must be one of {32,64}" -#endif - -#endif /* __SYSTEM_LOCAL_H_INCLUDED__ */ |