Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2021-09-02 | MIPS: Malta: fix alignment of the devicetree buffer | 1 | -1/+1 | |
2020-01-06 | remove ioremap_nocache and devm_ioremap_nocache | 1 | -1/+1 | |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 | 1 | -5/+1 | |
2017-11-03 | Update MIPS email addresses | 1 | -1/+1 | |
2017-08-30 | MIPS: CPS: Have asm/mips-cps.h include CM & CPC headers | 1 | -1/+1 | |
2017-08-29 | MIPS: CM: Use BIT/GENMASK for register fields, order & drop shifts | 1 | -1/+1 | |
2016-10-06 | MIPS: Malta: Probe interrupt controllers via DT | 1 | -0/+77 | |
2016-10-06 | MIPS: Malta: Use all available DDR by default | 1 | -6/+104 | |
2016-08-04 | tree-wide: replace config_enabled() with IS_ENABLED() | 1 | -2/+2 | |
2015-11-11 | MIPS: Malta: Setup RAM regions via DT | 1 | -0/+162 |