Age | Commit message (Expand) | Author | Files | Lines |
2023-09-01 | Merge tag 'riscv-for-linus-6.6-mw1' of git://git.kernel.org/pub/scm/linux/ker... | Linus Torvalds
| 1 | -118/+63 |
2023-08-08 | riscv: Fix CPU feature detection with SMP disabled | Samuel Holland
| 1 | -0/+5 |
2023-08-02 | RISC-V: cpu: refactor deprecated strncpy | Justin Stitt
| 1 | -6/+6 |
2023-07-25 | RISC-V: provide Kconfig & commandline options to control parsing "riscv,isa" | Conor Dooley
| 1 | -1/+7 |
2023-07-25 | RISC-V: try new extension properties in of_early_processor_hartid() | Conor Dooley
| 1 | -1/+28 |
2023-07-25 | RISC-V: add single letter extensions to riscv_isa_ext | Conor Dooley
| 1 | -26/+11 |
2023-07-25 | RISC-V: repurpose riscv_isa_ext array in riscv_fill_hwcap() | Conor Dooley
| 1 | -2/+3 |
2023-07-25 | RISC-V: shunt isa_ext_arr to cpufeature.c | Conor Dooley
| 1 | -73/+2 |
2023-07-25 | RISC-V: drop a needless check in print_isa_ext() | Conor Dooley
| 1 | -4/+0 |
2023-07-25 | RISC-V: don't parse dt/acpi isa string to get rv32/rv64 | Heiko Stuebner
| 1 | -12/+9 |
2023-07-25 | RISC-V: Provide a more helpful error message on invalid ISA strings | Palmer Dabbelt
| 1 | -2/+6 |
2023-06-23 | Merge patch series "ISA string parser cleanups" | Palmer Dabbelt
| 1 | -4/+30 |
2023-06-21 | RISC-V: always report presence of extensions formerly part of the base ISA | Conor Dooley
| 1 | -0/+4 |
2023-06-21 | RISC-V: validate riscv,isa at boot, not during ISA string parsing | Conor Dooley
| 1 | -3/+5 |
2023-06-21 | RISC-V: split early & late of_node to hartid mapping | Conor Dooley
| 1 | -1/+21 |
2023-06-19 | Merge patch series "RISC-V: Export Zba, Zbb to usermode via hwprobe" | Palmer Dabbelt
| 1 | -0/+2 |
2023-06-19 | RISC-V: Add Zba, Zbs extension probing | Evan Green
| 1 | -0/+2 |
2023-06-06 | Merge patch series "riscv: allow case-insensitive ISA string parsing" | Palmer Dabbelt
| 1 | -1/+2 |
2023-06-06 | riscv: allow case-insensitive ISA string parsing | Yangyu Chen
| 1 | -1/+2 |
2023-06-01 | RISC-V: cpu: Enable cpuinfo for ACPI systems | Sunil V L
| 1 | -8/+22 |
2023-05-05 | Merge tag 'kvm-riscv-6.4-1' of https://github.com/kvm-riscv/linux into HEAD | Paolo Bonzini
| 1 | -0/+2 |
2023-04-21 | RISC-V: Detect AIA CSRs from ISA string | Anup Patel
| 1 | -0/+2 |
2023-04-18 | Merge patch series "RISC-V Hardware Probing User Interface" | Palmer Dabbelt
| 1 | -6/+2 |
2023-04-18 | RISC-V: Move struct riscv_cpuinfo to new header | Evan Green
| 1 | -6/+2 |
2023-03-15 | Merge patch series "RISC-V: Apply Zicboz to clear_page" | Palmer Dabbelt
| 1 | -0/+1 |
2023-03-14 | RISC-V: Add Zicboz detection and block size parsing | Andrew Jones
| 1 | -0/+1 |
2023-03-09 | Merge patch series "riscv, mm: detect svnapot cpu support at runtime" | Palmer Dabbelt
| 1 | -0/+1 |
2023-03-07 | riscv: mm: modify pte format for Svnapot | Qinglin Pan
| 1 | -0/+1 |
2023-02-21 | RISC-V: fix ordering of Zbb extension | Heiko Stuebner
| 1 | -1/+1 |
2023-01-31 | RISC-V: add zbb support to string functions | Heiko Stuebner
| 1 | -0/+1 |
2023-01-19 | Merge patch series "Putting some basic order on isa extension lists" | Palmer Dabbelt
| 1 | -15/+38 |
2023-01-17 | RISC-V: resort all extensions in consistent orders | Conor Dooley
| 1 | -2/+2 |
2023-01-17 | RISC-V: clarify ISA string ordering rules in cpu.c | Conor Dooley
| 1 | -13/+36 |
2022-12-14 | Merge tag 'riscv-for-linus-6.2-mw1' of git://git.kernel.org/pub/scm/linux/ker... | Linus Torvalds
| 1 | -3/+27 |
2022-10-27 | RISC-V: Fix /proc/cpuinfo cpumask warning | Andrew Jones
| 1 | -0/+3 |
2022-10-27 | RISC-V: Cache SBI vendor values | Heiko Stuebner
| 1 | -3/+27 |
2022-10-14 | Merge tag 'riscv-for-linus-6.1-mw2' of git://git.kernel.org/pub/scm/linux/ker... | Linus Torvalds
| 1 | -0/+51 |
2022-10-13 | RISC-V: Add mvendorid, marchid, and mimpid to /proc/cpuinfo output | Palmer Dabbelt
| 1 | -0/+51 |
2022-10-11 | Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm | Linus Torvalds
| 1 | -0/+1 |
2022-10-06 | RISC-V: Print SSTC in canonical order | Palmer Dabbelt
| 1 | -1/+1 |
2022-10-03 | RISC-V: Add mvendorid, marchid, and mimpid to /proc/cpuinfo output | Anup Patel
| 1 | -0/+51 |
2022-10-02 | RISC-V: Probe Svinval extension form ISA string | Mayuresh Chitale
| 1 | -0/+1 |
2022-08-11 | RISC-V: Add Sstc extension support | Palmer Dabbelt
| 1 | -0/+1 |
2022-08-11 | RISC-V: Enable sstc extension parsing from DT | Atish Patra
| 1 | -0/+1 |
2022-08-11 | arch/riscv: add Zihintpause support | Dao Lu
| 1 | -0/+1 |
2022-08-10 | riscv: implement Zicbom-based CMO instructions + the t-head variant | Palmer Dabbelt
| 1 | -0/+1 |
2022-07-28 | riscv: Add support for non-coherent devices using zicbom extension | Heiko Stuebner
| 1 | -0/+1 |
2022-07-19 | riscv: cpu: Add 64bit hartid support on RV64 | Sunil V L
| 1 | -11/+15 |
2022-05-21 | riscv: Don't output a bogus mmu-type on a no MMU kernel | Niklas Cassel
| 1 | -0/+4 |
2022-05-11 | riscv: add RISC-V Svpbmt extension support | Heiko Stuebner
| 1 | -0/+1 |