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path: root/arch/riscv/kernel/smp.c
AgeCommit message (Expand)AuthorFilesLines
2023-08-08riscv: Fix CPU feature detection with SMP disabledGravatar Samuel Holland 1-5/+0
2023-07-04RISC-V: drop error print from riscv_hartid_to_cpuid()Gravatar Conor Dooley 1-1/+0
2023-04-28Merge tag 'smp-core-2023-04-27' of git://git.kernel.org/pub/scm/linux/kernel/...Gravatar Linus Torvalds 1-2/+2
2023-04-08RISC-V: Allow marking IPIs as suitable for remote FENCEsGravatar Anup Patel 1-1/+10
2023-04-08RISC-V: Treat IPIs as normal Linux IRQsGravatar Anup Patel 1-81/+79
2023-04-08RISC-V: Clear SIP bit only when using SBI IPI operationsGravatar Anup Patel 1-2/+0
2023-03-24treewide: Trace IPIs sent via smp_send_reschedule()Gravatar Valentin Schneider 1-2/+2
2022-11-29riscv: kexec: Fixup crash_smp_send_stop without multi coresGravatar Guo Ren 1-2/+95
2022-08-07Merge tag 'mm-nonmm-stable-2022-08-06-2' of git://git.kernel.org/pub/scm/linu...Gravatar Linus Torvalds 1-6/+0
2022-07-29profile: setup_profiling_timer() is moslty not implementedGravatar Ben Dooks 1-6/+0
2022-07-19riscv: smp: Add 64bit hartid support on RV64Gravatar Sunil V L 1-2/+2
2022-01-09RISC-V: Use common riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=nGravatar Sean Christopherson 1-10/+0
2021-10-26irq: riscv: perform irqentry in entry codeGravatar Mark Rutland 1-8/+1
2021-05-01RISC-V: Fix error code returned by riscv_hartid_to_cpuid()Gravatar Anup Patel 1-1/+1
2021-04-26riscv: Constify sbi_ipi_opsGravatar Jisheng Zhang 1-2/+2
2021-04-26riscv: Mark some global variables __ro_after_initGravatar Jisheng Zhang 1-2/+2
2021-03-16riscv: Enable generic clockevent broadcastGravatar Guo Ren 1-0/+16
2020-08-20RISC-V: Remove CLINT related code from timer and archGravatar Anup Patel 1-1/+0
2020-08-20RISC-V: Add mechanism to provide custom IPI operationsGravatar Anup Patel 1-19/+24
2020-07-30riscv: Support irq_work via self IPIsGravatar Greentime Hu 1-0/+15
2020-06-09RISC-V: self-contained IPI handling routineGravatar Anup Patel 1-2/+9
2020-05-04RISC-V: Export riscv_cpuid_to_hartid_mask() APIGravatar Anup Patel 1-0/+2
2020-03-18riscv: fix the IPI missing issue in nommu modeGravatar Greentime Hu 1-1/+1
2019-11-17riscv: provide native clint access for M-modeGravatar Christoph Hellwig 1-3/+13
2019-11-05riscv: abstract out CSR names for supervisor vs machine modeGravatar Christoph Hellwig 1-1/+1
2019-10-28riscv: add missing header file includesGravatar Paul Walmsley 1-0/+2
2019-09-20RISC-V: Export kernel symbols for kvmGravatar Atish Patra 1-0/+1
2019-09-05riscv: cleanup riscv_cpuid_to_hartid_maskGravatar Christoph Hellwig 1-0/+1
2019-09-05riscv: optimize send_ipi_singleGravatar Christoph Hellwig 1-1/+7
2019-09-05riscv: cleanup send_ipi_maskGravatar Christoph Hellwig 1-9/+7
2019-09-05riscv: refactor the IPI codeGravatar Christoph Hellwig 1-24/+31
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Gravatar Thomas Gleixner 1-12/+1
2019-05-16riscv: move flush_icache_{all,mm} to cacheflush.cGravatar Gary Guo 1-49/+0
2019-05-16RISC-V: Access CSRs using CSR numbersGravatar Anup Patel 1-1/+1
2019-05-16RISC-V: Fix minor checkpatch issues.Gravatar Atish Patra 1-2/+2
2019-04-30RISC-V: Add RISC-V specific arch_match_cpu_phys_idGravatar Atish Patra 1-0/+6
2019-03-04RISC-V: Fixmap support and MM cleanupsGravatar Palmer Dabbelt 1-1/+1
2019-03-04RISC-V: Allow hartid-to-cpuid function to fail.Gravatar Atish Patra 1-1/+0
2019-03-04RISC-V: Move cpuid to hartid mapping to SMP.Gravatar Atish Patra 1-0/+9
2019-01-07riscv: don't stop itself in smp_send_stopGravatar Andreas Schwab 1-7/+36
2018-10-22RISC-V: Show IPI statsGravatar Anup Patel 1-7/+32
2018-10-22RISC-V: Use Linux logical CPU number instead of hartidGravatar Atish Patra 1-9/+15
2018-10-22RISC-V: Add logical CPU indexing for RISC-VGravatar Atish Patra 1-0/+19
2018-08-13RISC-V: simplify software interrupt / IPI codeGravatar Christoph Hellwig 1-4/+2
2017-12-01RISC-V: Fixes for clean allmodconfig buildGravatar Palmer Dabbelt 1-0/+7
2017-11-30RISC-V: Flush I$ when making a dirty page executableGravatar Andrew Waterman 1-0/+48
2017-11-30RISC-V: Provide stub of setup_profiling_timer()Gravatar Olof Johansson 1-0/+7
2017-09-26RISC-V: Init and Halt CodeGravatar Palmer Dabbelt 1-0/+110