index
:
linux.git
arm64-uaccess
master
Linux kernel source tree
Linus Torvalds
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
riscv
/
kernel
/
smpboot.c
Age
Commit message (
Expand
)
Author
Files
Lines
2020-08-20
RISC-V: Remove CLINT related code from timer and arch
Anup Patel
1
-1
/
+0
2020-08-20
RISC-V: Add mechanism to provide custom IPI operations
Anup Patel
1
-2
/
+1
2020-08-04
RISC-V: Fix build warning for smpboot.c
Atish Patra
1
-1
/
+1
2020-07-30
RISC-V: Setup exception vector early
Atish Patra
1
-1
/
+1
2020-07-30
riscv: Fixup lockdep_assert_held with wrong param cpu_running
Zong Li
1
-1
/
+0
2020-06-29
RISC-V: Use a local variable instead of smp_processor_id()
Greentime Hu
1
-3
/
+4
2020-03-31
RISC-V: Add supported for ordered booting method using HSM
Atish Patra
1
-1
/
+1
2020-03-31
RISC-V: Add cpu_ops and modify default booting method
Atish Patra
1
-21
/
+30
2019-11-17
riscv: provide native clint access for M-mode
Christoph Hellwig
1
-0
/
+4
2019-10-28
riscv: for C functions called only from assembly, mark with __visible
Paul Walmsley
1
-1
/
+1
2019-10-28
riscv: add missing header file includes
Paul Walmsley
1
-0
/
+1
2019-10-28
riscv: add prototypes for assembly language functions from head.S
Paul Walmsley
1
-0
/
+2
2019-07-22
RISC-V: Parse cpu topology during boot.
Atish Patra
1
-0
/
+3
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
Thomas Gleixner
1
-9
/
+1
2019-05-16
RISC-V: Support nr_cpus command line option.
Atish Patra
1
-1
/
+9
2019-04-30
RISC-V: Implement nosmp commandline option.
Atish Patra
1
-1
/
+11
2019-03-04
RISC-V: Compare cpuid with NR_CPUS before mapping.
Atish Patra
1
-0
/
+5
2019-03-04
RISC-V: Do not wait indefinitely in __cpu_up
Atish Patra
1
-3
/
+12
2019-02-11
riscv: use for_each_of_cpu_node iterator
Johan Hovold
1
-2
/
+2
2019-01-23
RISC-V: fix bad use of of_node_put
Andreas Schwab
1
-5
/
+1
2018-12-21
RISC-V: Fix of_node_* refcount
Atish Patra
1
-1
/
+5
2018-10-22
RISC-V: Use Linux logical CPU number instead of hartid
Atish Patra
1
-9
/
+16
2018-10-22
RISC-V: Use WRITE_ONCE instead of direct access
Atish Patra
1
-2
/
+3
2018-10-22
RISC-V: Use mmgrab()
Palmer Dabbelt
1
-1
/
+2
2018-10-22
RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu
Palmer Dabbelt
1
-4
/
+5
2018-10-22
RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid
Palmer Dabbelt
1
-1
/
+1
2018-10-22
RISC-V: Disable preemption before enabling interrupts
Atish Patra
1
-1
/
+5
2018-10-22
RISC-V: Comment on the TLB flush in smp_callin()
Palmer Dabbelt
1
-0
/
+4
2018-08-13
clocksource: new RISC-V SBI timer driver
Palmer Dabbelt
1
-1
/
+0
2017-09-26
RISC-V: Init and Halt Code
Palmer Dabbelt
1
-0
/
+114