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2023-11-10Merge tag 'riscv-for-linus-6.7-mw2' of git://git.kernel.org/pub/scm/linux/ker...Gravatar Linus Torvalds 81-683/+2509
2023-11-09riscv: Optimize bitops with Zbb extensionGravatar Xiao Wang 1-3/+251
2023-11-09riscv: Rearrange hwcap.h and cpufeature.hGravatar Xiao Wang 12-100/+93
2023-11-09Merge patch "drivers: perf: Do not broadcast to other cpus when starting a co...Gravatar Palmer Dabbelt 9-35/+67
2023-11-08Merge patch series "Linux RISC-V AIA Preparatory Series"Gravatar Palmer Dabbelt 1-5/+6
2023-11-08RISC-V: Don't fail in riscv_of_parent_hartid() for disabled HARTsGravatar Anup Patel 1-5/+6
2023-11-08Merge tag 'riscv-for-linus-6.7-rc1' of git://git.kernel.org/pub/scm/linux/ker...Gravatar Linus Torvalds 36-245/+526
2023-11-08Merge patch series "riscv: Fix set_memory_XX() and set_direct_map_XX()"Gravatar Palmer Dabbelt 2-46/+236
2023-11-08riscv: Fix set_memory_XX() and set_direct_map_XX() by splitting huge linear m...Gravatar Alexandre Ghiti 1-40/+230
2023-11-08riscv: Don't use PGD entries for the linear mappingGravatar Alexandre Ghiti 1-6/+6
2023-11-07RISC-V: Probe misaligned access speed in parallelGravatar Evan Green 3-21/+77
2023-11-07RISC-V: Remove __init on unaligned_emulation_finish()Gravatar Evan Green 1-1/+1
2023-11-07RISC-V: Show accurate per-hart isa in /proc/cpuinfoGravatar Evan Green 1-4/+18
2023-11-07RISC-V: Don't rely on positional structure initializationGravatar Palmer Dabbelt 1-60/+65
2023-11-07Merge patch series "riscv: Add remaining module relocations and tests"Gravatar Palmer Dabbelt 18-105/+869
2023-11-07riscv: Add tests for riscv module loadingGravatar Charlie Jenkins 16-0/+366
2023-11-07riscv: Add remaining module relocationsGravatar Charlie Jenkins 2-30/+423
2023-11-07riscv: Avoid unaligned access when relocating modulesGravatar Emil Renner Berthing 1-76/+81
2023-11-07riscv: split cache ops out of dma-noncoherent.cGravatar Christoph Hellwig 3-15/+18
2023-11-06riscv: select ARCH_PROC_KCORE_TEXTGravatar Andreas Schwab 1-0/+3
2023-11-06riscv: kernel: Use correct SYM_DATA_*() macro for dataGravatar Clément Léger 1-5/+4
2023-11-06riscv: Use SYM_*() assembly macros instead of deprecated onesGravatar Clément Léger 17-74/+60
2023-11-06riscv: use ".L" local labels in assembly when applicableGravatar Clément Léger 4-44/+44
2023-11-06riscv: boot: Fix creation of loader.binGravatar Geert Uytterhoeven 1-0/+1
2023-11-06Merge patch series "riscv: tlb flush improvements"Gravatar Palmer Dabbelt 5-95/+144
2023-11-06riscv: Improve flush_tlb_kernel_range()Gravatar Alexandre Ghiti 2-15/+30
2023-11-06riscv: Make __flush_tlb_range() loop over pte instead of flushing the whole tlbGravatar Alexandre Ghiti 4-81/+72
2023-11-06riscv: Improve flush_tlb_range() for hugetlb pagesGravatar Alexandre Ghiti 1-1/+28
2023-11-06riscv: Improve tlb_flush()Gravatar Alexandre Ghiti 3-1/+17
2023-11-05riscv: mm: update T-Head memory type definitionsGravatar Jisheng Zhang 1-5/+9
2023-11-05Merge patch series "riscv: vdso.lds.S: some improvement"Gravatar Palmer Dabbelt 1-17/+13
2023-11-05riscv: vdso.lds.S: remove hardcoded 0x800 .text start addrGravatar Jisheng Zhang 1-9/+8
2023-11-05riscv: vdso.lds.S: merge .data section into .rodata sectionGravatar Jisheng Zhang 1-8/+7
2023-11-05riscv: vdso.lds.S: drop __alt_start and __alt_end symbolsGravatar Jisheng Zhang 1-2/+0
2023-11-05riscv: add userland instruction dump to RISC-V splatsGravatar Yunhui Cui 1-3/+18
2023-11-05riscv: kprobes: allow writing to x0Gravatar Nam Cao 1-1/+1
2023-11-05riscv: provide riscv-specific is_trap_insn()Gravatar Nam Cao 1-0/+6
2023-11-05Merge patch series "Improve PTDUMP and introduce new fields"Gravatar Palmer Dabbelt 2-21/+36
2023-11-05riscv: Introduce NAPOT field to PTDUMPGravatar Yu Chien Peter Lin 1-0/+4
2023-11-05riscv: Introduce PBMT field to PTDUMPGravatar Yu Chien Peter Lin 1-0/+16
2023-11-05riscv: Improve PTDUMP to show RSW with non-zero valueGravatar Yu Chien Peter Lin 2-22/+17
2023-11-05RISC-V: capitalise CMO op macrosGravatar Conor Dooley 5-29/+29
2023-11-05riscv: don't probe unaligned access speed if already doneGravatar Jisheng Zhang 1-0/+4
2023-11-05riscv: defconfig : add CONFIG_MMC_DW for starfiveGravatar Jinyu Tang 1-0/+2
2023-11-05riscv: signal: handle syscall restart before get_signalGravatar Haorong Lu 1-39/+46
2023-11-05Merge patch series "Add support to handle misaligned accesses in S-mode"Gravatar Palmer Dabbelt 11-59/+524
2023-11-04Merge tag 'kbuild-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/masa...Gravatar Linus Torvalds 4-29/+3
2023-11-03Merge tag 'tty-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/greg...Gravatar Linus Torvalds 2-12/+2
2023-11-02Merge tag 'mm-nonmm-stable-2023-11-02-14-08' of git://git.kernel.org/pub/scm/...Gravatar Linus Torvalds 4-130/+27
2023-11-02Merge tag 'mm-stable-2023-11-01-14-33' of git://git.kernel.org/pub/scm/linux/...Gravatar Linus Torvalds 1-0/+12