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path: root/arch/x86/kernel/tsc_msr.c
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2020-08-15Merge tag 'x86-urgent-2020-08-15' of git://git.kernel.org/pub/scm/linux/kerne...Gravatar Linus Torvalds 1-2/+7
2020-08-07x86/tsr: Fix tsc frequency enumeration bug on Lightning Mountain SoCGravatar Dilip Kota 1-2/+7
2020-08-06locking/seqlock, headers: Untangle the spaghetti monsterGravatar Peter Zijlstra 1-0/+1
2020-03-30Merge tag 'x86-timers-2020-03-30' of git://git.kernel.org/pub/scm/linux/kerne...Gravatar Linus Torvalds 1-16/+112
2020-03-24x86/kernel: Convert to new CPU match macrosGravatar Thomas Gleixner 1-7/+7
2020-03-11x86/tsc_msr: Make MSR derived TSC frequency more accurateGravatar Hans de Goede 1-11/+86
2020-03-11x86/tsc_msr: Fix MSR_FSB_FREQ mask for Cherry Trail devicesGravatar Hans de Goede 1-2/+15
2020-03-11x86/tsc_msr: Use named struct initializersGravatar Hans de Goede 1-10/+18
2019-09-06x86/cpu: Update init data for new Airmont CPU modelGravatar Rahul Tanwar 1-0/+5
2019-05-09x86/apic: Rename 'lapic_timer_frequency' to 'lapic_timer_period'Gravatar Daniel Drake 1-2/+2
2018-10-02x86/cpu: Sanitize FAM6_ATOM namingGravatar Peter Zijlstra 1-5/+5
2018-07-03x86/platform/intel-mid: Remove custom TSC calibrationGravatar Andy Shevchenko 1-0/+5
2018-07-03x86/tsc: Use SPDX identifier and update Intel copyrightGravatar Andy Shevchenko 1-4/+3
2018-07-03x86/tsc: Convert to use x86_match_cpu() and INTEL_CPU_FAM6()Gravatar Andy Shevchenko 1-41/+42
2018-07-03x86/tsc: Add missing header to tsc_msr.cGravatar Andy Shevchenko 1-0/+1
2016-11-18x86/tsc: Set TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Atom SoCsGravatar Bin Gao 1-0/+19
2016-07-11x86/tsc_msr: Remove irqoff around MSR-based TSC enumerationGravatar Len Brown 1-1/+1
2016-07-10x86/tsc_msr: Add Airmont reference clock valuesGravatar Len Brown 1-1/+4
2016-07-10x86/tsc_msr: Correct Silvermont reference clock valuesGravatar Len Brown 1-3/+3
2016-07-10x86/tsc_msr: Update comments, expand definitionsGravatar Len Brown 1-26/+10
2016-07-10x86/tsc_msr: Remove debugging messagesGravatar Len Brown 1-16/+3
2016-07-10x86/tsc_msr: Identify Intel-specific codeGravatar Len Brown 1-0/+3
2016-07-10Revert "x86/tsc: Add missing Cherrytrail frequency to the table"Gravatar Len Brown 1-3/+0
2016-05-12x86/tsc: Add missing Cherrytrail frequency to the tableGravatar Jeremy Compostella 1-0/+3
2016-05-06x86/tsc: Read all ratio bits from MSR_PLATFORM_INFOGravatar Chen Yu 1-1/+1
2014-02-19x86: tsc: Add missing Baytrail frequency to the tableGravatar Mika Westerberg 1-1/+1
2014-02-19x86, tsc: Fallback to normal calibration if fast MSR calibration failsGravatar Thomas Gleixner 1-14/+14
2014-01-16x86, tsc, apic: Unbreak static (MSR) calibration when CONFIG_X86_LOCAL_APIC=nGravatar H. Peter Anvin 1-0/+2
2014-01-15x86, tsc: Add static (MSR) TSC calibration on Intel Atom SoCsGravatar Bin Gao 1-0/+125