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path: root/drivers/clk/meson/meson8b.h
AgeCommit message (Expand)AuthorFilesLines
2017-08-04clk: meson: meson8b: register the built-in reset controllerGravatar Martin Blumenstingl 1-1/+8
2017-08-04clk: meson8b: expose every clock in the bindingsGravatar Jerome Brunet 1-99/+4
2017-06-12clk: meson8b: export the ethernet gate clockGravatar Martin Blumenstingl 1-1/+1
2017-06-12clk: meson8b: export the USB clocksGravatar Martin Blumenstingl 1-5/+5
2017-06-12clk: meson8b: export the gate clock for the HW random number generatorGravatar Martin Blumenstingl 1-1/+1
2017-06-12clk: meson8b: export the SDIO clockGravatar Martin Blumenstingl 1-1/+1
2017-06-12clk: meson8b: export the SAR ADC clocksGravatar Martin Blumenstingl 1-2/+2
2017-03-27clk: meson8b: add the mplls clocks 0, 1 and 2Gravatar Jerome Brunet 1-1/+19
2016-09-01meson: clk: Add support for clock gatesGravatar Alexander Müller 1-0/+5
2016-09-01clk: meson: Copy meson8b CLKID defines to private header fileGravatar Alexander Müller 1-0/+107
2016-09-01meson: clk: Rename register names according to Amlogic datasheetGravatar Alexander Müller 1-6/+5
2016-09-01meson: clk: Move register definitions to meson8b.hGravatar Alexander Müller 1-0/+40