aboutsummaryrefslogtreecommitdiff
path: root/drivers/clk/socfpga
AgeCommit message (Expand)AuthorFilesLines
2016-02-22clk: socfpga: allow for multiple parents on Arria10 periph clocksGravatar Dinh Nguyen 2-9/+4
2016-02-08clk: socfpga: fix __init annotationGravatar Arnd Bergmann 1-1/+1
2015-08-24clk: socfpga: Add a second parent option for the dbg_base_clkGravatar Dinh Nguyen 2-4/+15
2015-07-28clk: socfpga: switch to GENMASK()Gravatar Andy Shevchenko 5-5/+4
2015-07-20clk: socfpga: Remove clk.h and clkdev.h includesGravatar Stephen Boyd 7-7/+6
2015-06-09clk: socfpga: remove a stray tabGravatar Dan Carpenter 1-1/+1
2015-06-05clk: socfpga: make use of of_clk_parent_fill helper functionGravatar Dinh Nguyen 2-11/+2
2015-05-21clk: socfpga: add a clock driver for the Arria 10 platformGravatar Dinh Nguyen 6-1/+469
2015-05-21clk: socfpga: update clk.h so for Arria10 platform to useGravatar Dinh Nguyen 2-5/+5
2015-05-14clk: socfpga: Silence sparse warningGravatar Stephen Boyd 1-1/+1
2015-05-14clk: socfpga: Silence sparse warningGravatar Stephen Boyd 1-1/+1
2014-05-12Merge tag 'socfpga-clk-update-for-v3.16' of git://git.rocketboards.org/linux-...Gravatar Mike Turquette 3-4/+23
2014-05-12clk: socfpga: add divider registers to the main pll outputsGravatar Dinh Nguyen 3-4/+23
2014-04-30clk: socfpga: fix clock driver for 3.15Gravatar Dinh Nguyen 2-20/+10
2014-03-18clk: socfpga: Fix section mismatch warningGravatar Dinh Nguyen 1-1/+1
2014-02-26clk: socfpga: Support multiple parents for the pll clocksGravatar Dinh Nguyen 1-4/+22
2014-02-26clk: socfpga: Fix integer overflow in clock calculationGravatar Dinh Nguyen 1-3/+5
2014-02-18clk: socfpga: Add a clk-phase property to the "altr,socfpga-gate-clk"Gravatar Dinh Nguyen 1-0/+68
2014-02-18clk: socfpga: split clk codeGravatar Steffen Trumtrar 6-306/+462
2014-02-18clk: socfpga: fix define typoGravatar Steffen Trumtrar 1-3/+3
2014-02-18clk: socfpga: remove unused fieldGravatar Steffen Trumtrar 1-1/+0
2014-02-18clk: socfpga: Remove socfpga_init_clocksGravatar Dinh Nguyen 1-10/+0
2014-02-18clk: socfpga: Look for the GPIO_DB_CLK by its offsetGravatar Dinh Nguyen 1-2/+3
2014-02-18clk: socfpga: Map the clk manager base address in the clock driverGravatar Dinh Nguyen 1-4/+16
2013-12-19clk: socfpga: Use NULL instead of 0Gravatar Sachin Kamat 1-1/+1
2013-11-27clk: socfpga: Remove check for "reg" property in socfpga_clk_initGravatar Dinh Nguyen 1-3/+1
2013-10-07clk: socfpga: Fix incorrect sdmmc clock nameGravatar Dinh Nguyen 1-1/+1
2013-06-11ARM: socfpga: Add support to gate peripheral clocksGravatar Dinh Nguyen 1-9/+185
2013-04-14ARM: socfpga: Upgrade clk driver for socfpga to make use of dts clock entriesGravatar Dinh Nguyen 1-21/+142
2012-07-19ARM: socfpga: initial support for Altera's SOCFPGA platformGravatar Dinh Nguyen 2-0/+52