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path:
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drivers
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cxl
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cxl.h
Age
Commit message (
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Author
Files
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2021-09-21
cxl/core: Split decoder setup into alloc + add
Dan Williams
1
-9
/
+6
2021-09-21
tools/testing/cxl: Introduce a mock memory device + driver
Dan Williams
1
-1
/
+1
2021-09-21
cxl/bus: Populate the target list at decoder create
Dan Williams
1
-15
/
+10
2021-09-21
tools/testing/cxl: Introduce a mocked-up CXL port hierarchy
Dan Williams
1
-0
/
+16
2021-09-21
cxl/pmem: Add support for multiple nvdimm-bridge objects
Dan Williams
1
-0
/
+2
2021-08-06
cxl/pci: Simplify register setup
Ben Widawsky
1
-1
/
+0
2021-06-15
cxl/pmem: Register 'pmem' / cxl_nvdimm devices
Dan Williams
1
-1
/
+11
2021-06-15
cxl/pmem: Add initial infrastructure for pmem support
Dan Williams
1
-0
/
+24
2021-06-15
cxl/core: Add cxl-bus driver infrastructure
Dan Williams
1
-0
/
+22
2021-06-12
cxl/hdm: Fix decoder count calculation
Ben Widawsky
1
-0
/
+7
2021-06-09
cxl/acpi: Introduce cxl_decoder objects
Dan Williams
1
-0
/
+63
2021-06-09
cxl/acpi: Add downstream port data to cxl_port instances
Dan Williams
1
-0
/
+21
2021-06-09
cxl/acpi: Introduce the root of a cxl_port topology
Dan Williams
1
-0
/
+31
2021-06-05
cxl/pci: Add HDM decoder capabilities
Ben Widawsky
1
-6
/
+59
2021-06-05
cxl/pci: Map registers based on capabilities
Ira Weiny
1
-5
/
+28
2021-05-14
cxl/core: Refactor CXL register lookup for bridge reuse
Dan Williams
1
-0
/
+3
2021-05-14
cxl/mem: Introduce 'struct cxl_regs' for "composable" CXL devices
Dan Williams
1
-0
/
+32
2021-05-14
cxl/mem: Move some definitions to mem.h
Dan Williams
1
-57
/
+0
2021-02-16
cxl/mem: Enable commands via CEL
Ben Widawsky
1
-0
/
+2
2021-02-16
cxl/mem: Register CXL memX devices
Dan Williams
1
-0
/
+3
2021-02-16
cxl/mem: Find device capabilities
Ben Widawsky
1
-0
/
+90