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path: root/drivers/cxl/mem.c
AgeCommit message (Expand)AuthorFilesLines
2023-12-22cxl: Export sysfs attributes for memory device QoS classGravatar Dave Jiang 1-6/+61
2023-10-27cxl/pci: Add RCH downstream port AER register discoveryGravatar Robert Richter 1-0/+2
2023-10-27cxl/hdm: Use stored Component Register mappings to map HDM decoder capabilityGravatar Robert Richter 1-3/+2
2023-06-25Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxlGravatar Dan Williams 1-13/+3
2023-06-25cxl/mbox: Move mailbox related driver state to its own data structureGravatar Dan Williams 1-3/+7
2023-06-25cxl/pci: Early setup RCH dport component registers from RCRBGravatar Robert Richter 1-9/+0
2023-06-25cxl/mem: Prepare for early RCH dport component register setupGravatar Robert Richter 1-5/+4
2023-06-25cxl: Rename 'uport' to 'uport_dev'Gravatar Dan Williams 1-1/+1
2023-06-25cxl/acpi: Probe RCRB later during RCH downstream port creationGravatar Robert Richter 1-2/+2
2023-05-18cxl: Move cxl_await_media_ready() to before capacity info retrievalGravatar Dave Jiang 1-0/+3
2023-04-23cxl/mem: Add debugfs attributes for poison inject and clearGravatar Alison Schofield 1-0/+28
2023-04-23cxl/memdev: Add trigger_poison_list sysfs attributeGravatar Alison Schofield 1-0/+43
2022-12-05cxl/port: Add RCD endpoint port enumerationGravatar Dan Williams 1-8/+25
2022-12-05cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_memGravatar Dan Williams 1-0/+38
2022-12-02cxl/pmem: Refactor nvdimm device registration, delete the workqueueGravatar Dan Williams 1-0/+9
2022-07-21cxl/mem: Enumerate port targets before adding endpointsGravatar Dan Williams 1-29/+1
2022-07-21cxl/port: Record parent dport when adding portsGravatar Dan Williams 1-4/+6
2022-07-10cxl/mem: Add a debugfs version of 'iomem' for DPA, 'dpamem'Gravatar Dan Williams 1-0/+23
2022-06-21cxl: Fix cleanup of port devices on failure to probe driver.Gravatar Jonathan Cameron 1-1/+6
2022-05-19cxl/port: Move endpoint HDM Decoder Capability init to port driverGravatar Dan Williams 1-11/+0
2022-05-19cxl/pci: Drop @info argument to cxl_hdm_decode_init()Gravatar Dan Williams 1-2/+1
2022-05-19cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()Gravatar Dan Williams 1-79/+1
2022-05-19cxl/mem: Skip range enumeration if mem_enable clearGravatar Dan Williams 1-1/+1
2022-05-19cxl/mem: Consolidate CXL DVSEC Range enumeration in the coreGravatar Dan Williams 1-6/+8
2022-05-19cxl/pci: Move cxl_await_media_ready() to the coreGravatar Dan Williams 1-1/+1
2022-05-19cxl/mem: Validate port connectivity before dvsec rangesGravatar Dan Williams 1-16/+16
2022-05-19cxl/mem: Fix cxl_mem_probe() error exitGravatar Dan Williams 1-2/+4
2022-05-19cxl/pci: Consolidate wait_for_media() and wait_for_media_ready()Gravatar Dan Williams 1-18/+1
2022-05-19cxl/mem: Drop mem_enabled check from wait_for_media()Gravatar Dan Williams 1-4/+0
2022-04-28cxl: Drop cxl_device_lock()Gravatar Dan Williams 1-2/+2
2022-04-22PM: CXL: Disable suspendGravatar Dan Williams 1-1/+21
2022-04-12cxl/mem: Replace redundant debug message with a commentGravatar Dan Williams 1-4/+10
2022-04-12cxl/mem: Rename cxl_dvsec_decode_init() to cxl_hdm_decode_init()Gravatar Dan Williams 1-6/+6
2022-04-12cxl/mem: Make cxl_dvsec_range() init failure fatalGravatar Dan Williams 1-0/+3
2022-04-12cxl/mem: Drop DVSEC vs EFI Memory Map sanity checkGravatar Dan Williams 1-23/+1
2022-02-08cxl/mem: Add the cxl_mem driverGravatar Ben Widawsky 1-0/+228
2021-05-26cxl: Rename mem to pciGravatar Ben Widawsky 1-1525/+0
2021-05-14cxl/core: Refactor CXL register lookup for bridge reuseGravatar Dan Williams 1-44/+6
2021-05-14cxl/mem: Introduce 'struct cxl_regs' for "composable" CXL devicesGravatar Dan Williams 1-20/+24
2021-05-14cxl/mem: Move some definitions to mem.hGravatar Dan Williams 1-20/+1
2021-04-16cxl/mem: Fix memory device capacity probingGravatar Dan Williams 1-2/+5
2021-04-15cxl/mem: Fix register block offset calculationGravatar Ben Widawsky 1-1/+1
2021-04-06cxl/mem: Force array size of mem_commands[] to CXL_MEM_COMMAND_ID_MAXGravatar Robert Richter 1-1/+1
2021-04-06cxl/mem: Disable cxl device power managementGravatar Dan Williams 1-0/+1
2021-04-06cxl/mem: Do not rely on device_add() side effects for dev_set_name() failuresGravatar Dan Williams 1-10/+29
2021-04-06cxl/mem: Fix synchronization mechanism for device removal vs ioctl operationsGravatar Dan Williams 1-47/+50
2021-04-06cxl/mem: Use sysfs_emit() for attribute show routinesGravatar Dan Williams 1-4/+4
2021-02-22cxl/mem: Fix potential memory leakGravatar Ben Widawsky 1-1/+3
2021-02-19cxl/mem: Return -EFAULT if copy_to_user() failsGravatar Dan Carpenter 1-1/+4
2021-02-16cxl/mem: Add set of informational commandsGravatar Ben Widawsky 1-0/+9