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path: root/drivers/cxl/pci.c
AgeCommit message (Expand)AuthorFilesLines
2023-02-14Merge branch 'for-6.3/cxl' into cxl/nextGravatar Dan Williams 1-8/+62
2023-02-14cxl: add RAS status unmasking for CXLGravatar Dave Jiang 1-0/+65
2023-02-14cxl: remove unnecessary calling of pci_enable_pcie_error_reporting()Gravatar Dave Jiang 1-11/+0
2023-01-30cxl/pci: Fix irq oneshot expectationsGravatar Dan Williams 1-1/+2
2023-01-30cxl/pci: Set the device timestampGravatar Jonathan Cameron 1-0/+4
2023-01-26cxl/mem: Wire up event interruptsGravatar Davidlohr Bueso 1-10/+211
2023-01-26cxl/mem: Read, trace, and clear events on driver loadGravatar Ira Weiny 1-0/+33
2023-01-24cxl/pci: Show opcode in debug messages when sending a commandGravatar Robert Richter 1-1/+1
2023-01-04cxl/pci: Move tracepoint definitions to drivers/cxl/core/Gravatar Dan Williams 1-111/+0
2022-12-06cxl/pci: Remove endian confusionGravatar Dan Williams 1-4/+3
2022-12-06cxl/pci: Add some type-safety to the AER trace pointsGravatar Dan Williams 1-2/+2
2022-12-05Merge branch 'for-6.2/cxl-aer' into for-6.2/cxlGravatar Dan Williams 1-40/+173
2022-12-05cxl/port: Add RCD endpoint port enumerationGravatar Dan Williams 1-0/+10
2022-12-03cxl/pci: Add callback to log AER correctable errorGravatar Dave Jiang 1-0/+20
2022-12-03cxl/pci: Add (hopeful) error handling supportGravatar Dan Williams 1-0/+137
2022-12-03cxl/pci: add tracepoint events for CXL RASGravatar Dave Jiang 1-0/+2
2022-12-03cxl/pci: Find and map the RAS Capability StructureGravatar Dan Williams 1-0/+8
2022-12-03cxl/core/regs: Make cxl_map_{component, device}_regs() device genericGravatar Dan Williams 1-19/+6
2022-12-03cxl/pci: Kill cxl_map_regs()Gravatar Dan Williams 1-22/+1
2022-12-02cxl/pmem: Refactor nvdimm device registration, delete the workqueueGravatar Dan Williams 1-3/+0
2022-11-14cxl/doe: Request exclusive DOE accessGravatar Ira Weiny 1-0/+5
2022-07-19cxl/pci: Create PCI DOE mailbox's for memory devicesGravatar Ira Weiny 1-0/+44
2022-07-09cxl/mem: Convert partition-info to resourcesGravatar Dan Williams 1-1/+1
2022-05-19cxl/mem: Consolidate CXL DVSEC Range enumeration in the coreGravatar Dan Williams 1-135/+0
2022-05-19cxl/pci: Move cxl_await_media_ready() to the coreGravatar Dan Williams 1-44/+1
2022-05-19cxl/pci: Drop wait_for_valid() from cxl_await_media_ready()Gravatar Dan Williams 1-4/+0
2022-05-19cxl/pci: Consolidate wait_for_media() and wait_for_media_ready()Gravatar Dan Williams 1-2/+2
2022-04-12cxl/pci: Make cxl_dvsec_ranges() failure not fatal to cxl_pciGravatar Dan Williams 1-9/+18
2022-04-12cxl/pci: Add debug for DVSEC range init failuresGravatar Dan Williams 1-3/+10
2022-04-12cxl/mbox: Use new return_code handlingGravatar Davidlohr Bueso 1-1/+2
2022-04-12cxl/mbox: Improve handling of mbox_cmd hw return codesGravatar Davidlohr Bueso 1-1/+1
2022-04-12cxl/pci: Use CXL_MBOX_SUCCESS to check against mbox_cmd return codeGravatar Davidlohr Bueso 1-2/+2
2022-04-08cxl/pci: Drop shadowed variableGravatar Dan Williams 1-1/+0
2022-02-08cxl/pci: Emit device serial numberGravatar Dan Williams 1-0/+1
2022-02-08cxl/pci: Implement wait for media activeGravatar Ben Widawsky 1-1/+48
2022-02-08cxl/pci: Retrieve CXL DVSEC memory infoGravatar Ben Widawsky 1-0/+119
2022-02-08cxl/pci: Cache device DVSEC offsetGravatar Ben Widawsky 1-0/+6
2022-02-08cxl/pci: Store component register base in cxldsGravatar Ben Widawsky 1-0/+11
2022-02-08cxl/pci: Rename pci.h to cxlpci.hGravatar Dan Williams 1-1/+1
2022-02-08cxl/acpi: Map component registers for Root PortsGravatar Ben Widawsky 1-52/+0
2022-02-08cxl: Flesh out register namesGravatar Ben Widawsky 1-7/+7
2022-02-08cxl/pci: Defer mailbox status checks to command timeoutsGravatar Dan Williams 1-101/+33
2022-02-08cxl/pci: Implement Interface Ready TimeoutGravatar Ben Widawsky 1-0/+35
2021-11-15cxl/memdev: Change cxl_mem to a more descriptive nameGravatar Ira Weiny 1-60/+60
2021-10-29cxl/pci: Use pci core's DVSEC functionalityGravatar Ben Widawsky 1-24/+2
2021-10-29cxl/pci: Split cxl_pci_setup_regs()Gravatar Ben Widawsky 1-36/+37
2021-10-29cxl/pci: Add @base to cxl_register_mapGravatar Dan Williams 1-15/+16
2021-10-29cxl/pci: Make more use of cxl_register_mapGravatar Ben Widawsky 1-34/+25
2021-10-29cxl/pci: Remove pci request/release regionsGravatar Ben Widawsky 1-5/+0
2021-10-29cxl/pci: Fix NULL vs ERR_PTR confusionGravatar Dan Williams 1-1/+1