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path: root/drivers/cxl
AgeCommit message (Expand)AuthorFilesLines
2023-11-02cxl/pci: Change CXL AER support check to use native AERGravatar Terry Bowman 1-2/+2
2023-10-31cxl/hdm: Remove broken error pathGravatar Dan Williams 2-17/+10
2023-10-31cxl/hdm: Fix && vs || bugGravatar Dan Carpenter 1-1/+1
2023-10-31Merge branch 'for-6.7/cxl-commited' into cxl/nextGravatar Dan Williams 5-6/+40
2023-10-31Merge branch 'for-6.7/cxl' into cxl/nextGravatar Dan Williams 4-5/+11
2023-10-31Merge branch 'for-6.7/cxl-qtg' into cxl/nextGravatar Dan Williams 5-12/+60
2023-10-31Merge branch 'for-6.7/cxl-rch-eh' into cxl/nextGravatar Dan Williams 10-129/+406
2023-10-27cxl: Add support for reading CXL switch CDAT tableGravatar Dave Jiang 2-5/+20
2023-10-27cxl: Add checksum verification to CDAT from CXLGravatar Dave Jiang 1-7/+23
2023-10-27cxl: Export QTG ids from CFMWS to sysfs as qos_class attributeGravatar Dave Jiang 3-0/+17
2023-10-27cxl: Add decoders_committed sysfs attribute to cxl_portGravatar Dave Jiang 1-0/+25
2023-10-27cxl: Add cxl_decoders_committed() helperGravatar Dave Jiang 5-6/+15
2023-10-27cxl/core/regs: Rework cxl_map_pmu_regs() to use map->dev for devmGravatar Robert Richter 3-6/+4
2023-10-27cxl/core/regs: Rename phys_addr in cxl_map_component_regs()Gravatar Robert Richter 1-3/+3
2023-10-27cxl/pci: Disable root port interrupts in RCH modeGravatar Terry Bowman 1-0/+32
2023-10-27cxl/pci: Add RCH downstream port error loggingGravatar Terry Bowman 1-0/+96
2023-10-27cxl/pci: Map RCH downstream AER registers for logging protocol errorsGravatar Terry Bowman 2-0/+46
2023-10-27cxl/pci: Update CXL error logging to use RAS register addressGravatar Terry Bowman 1-13/+31
2023-10-27PCI/AER: Refactor cper_print_aer() for use by CXL driver moduleGravatar Terry Bowman 1-0/+1
2023-10-27cxl/pci: Add RCH downstream port AER register discoveryGravatar Robert Richter 5-0/+61
2023-10-27cxl/port: Remove Component Register base address from struct cxl_portGravatar Robert Richter 2-5/+1
2023-10-27cxl/pci: Remove Component Register base address from struct cxl_dev_stateGravatar Robert Richter 2-5/+0
2023-10-27cxl/hdm: Use stored Component Register mappings to map HDM decoder capabilityGravatar Robert Richter 3-39/+43
2023-10-27cxl/pci: Store the endpoint's Component Register mappings in struct cxl_dev_s...Gravatar Robert Richter 3-4/+9
2023-10-27cxl/port: Pre-initialize component register mappingsGravatar Robert Richter 1-5/+7
2023-10-27cxl/port: Rename @comp_map to @reg_map in struct cxl_register_mapGravatar Robert Richter 2-7/+7
2023-10-27cxl/port: Fix @host confusion in cxl_dport_setup_regs()Gravatar Dan Williams 1-12/+31
2023-10-27cxl/core/regs: Rename @dev to @host in struct cxl_register_mapGravatar Robert Richter 5-20/+20
2023-10-27cxl/port: Fix delete_endpoint() vs parent unregistration raceGravatar Dan Williams 1-15/+19
2023-10-27cxl/region: Fix x1 root-decoder granularity calculationsGravatar Jim Harris 1-1/+8
2023-10-27cxl/region: Fix cxl_region_rwsem lock held when returning to user spaceGravatar Li Zhijian 1-1/+1
2023-10-27cxl/region: Use cxl_calc_interleave_pos() for auto-discoveryGravatar Alison Schofield 1-112/+15
2023-10-27cxl/region: Calculate a target position in a region interleaveGravatar Alison Schofield 1-0/+127
2023-10-26cxl/region: Prepare the decoder match range helper for reuseGravatar Alison Schofield 1-6/+11
2023-10-24cxl/mbox: Remove useless cast in cxl_mem_create_range_info()Gravatar Alison Schofield 1-2/+1
2023-10-24cxl/region: Do not try to cleanup after cxl_region_setup_targets() failsGravatar Jim Harris 1-7/+7
2023-10-09cxl/mem: Fix shutdown orderGravatar Dan Williams 1-1/+1
2023-10-06cxl/memdev: Fix sanitize vs decoder setup lockingGravatar Dan Williams 8-49/+90
2023-10-06cxl/pci: Fix sanitize notifier setupGravatar Dan Williams 3-42/+50
2023-10-06cxl/pci: Clarify devm host for memdev relative setupGravatar Dan Williams 3-12/+13
2023-10-06cxl/pci: Remove inconsistent usage of dev_err_probe()Gravatar Dan Williams 1-11/+2
2023-10-06cxl/pci: Remove hardirq handler for cxl_request_irq()Gravatar Dan Williams 1-6/+6
2023-09-29cxl/pci: Cleanup 'sanitize' to always pollGravatar Dan Williams 3-39/+26
2023-09-29cxl/pci: Remove unnecessary device reference management in sanitize workGravatar Dan Williams 1-5/+0
2023-09-22cxl/acpi: Annotate struct cxl_cxims_data with __counted_byGravatar Kees Cook 1-2/+2
2023-09-22cxl/port: Fix cxl_test register enumeration regressionGravatar Dan Williams 1-4/+9
2023-09-15cxl/pci: Update commentGravatar Ira Weiny 1-1/+4
2023-09-15cxl/port: Quiet warning messages from the cxl_test environmentGravatar Dan Williams 2-2/+7
2023-09-14cxl/region: Refactor granularity select in cxl_port_setup_targets()Gravatar Alison Schofield 1-9/+8
2023-09-14cxl/region: Match auto-discovered region decoders by HPA rangeGravatar Alison Schofield 1-1/+23