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2024-03-12cxl: Set cxlmd->endpoint before adding port deviceGravatar Dave Jiang 1-1/+1
2024-03-12cxl: Move QoS class to be calculated from the nearest CPUGravatar Dave Jiang 1-3/+3
2024-03-12cxl: Split out host bridge access coordinatesGravatar Dave Jiang 3-9/+56
2024-03-12cxl: Split out combine_coordinates() for common shared usageGravatar Dave Jiang 3-25/+29
2024-03-12ACPI: HMAT / cxl: Add retrieval of generic port coordinates for both access c...Gravatar Dave Jiang 3-5/+7
2024-02-20cxl/acpi: Fix load failures due to single window creation failureGravatar Dan Williams 1-18/+28
2024-02-20Merge branch 'for-6.8/cxl-cper' into for-6.8/cxlGravatar Dan Williams 2-59/+4
2024-02-20acpi/ghes: Remove CXL CPER notificationsGravatar Dan Williams 1-56/+1
2024-02-16cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS windowGravatar Robert Richter 1-3/+3
2024-02-16cxl: Fix sysfs export of qos_class for memdevGravatar Dave Jiang 4-36/+66
2024-02-16cxl: Remove unnecessary type cast in cxl_qos_class_verify()Gravatar Dave Jiang 1-2/+1
2024-02-16cxl: Change 'struct cxl_memdev_state' *_perf_list to single 'struct cxl_dpa_p...Gravatar Dave Jiang 4-90/+34
2024-02-16cxl/region: Allow out of order assembly of autodiscovered regionsGravatar Alison Schofield 1-10/+38
2024-02-16cxl/region: Handle endpoint decoders in cxl_region_find_decoder()Gravatar Alison Schofield 1-6/+8
2024-02-09Merge tag 'efi-fixes-for-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel...Gravatar Linus Torvalds 1-3/+3
2024-02-03cxl/trace: Remove unnecessary memcpy'sGravatar Ira Weiny 1-3/+3
2024-01-29cxl/pci: Skip to handle RAS errors if CXL.mem device is detachedGravatar Li Ming 1-12/+31
2024-01-24cxl/region：Fix overflow issue in alloc_hpa()Gravatar Quanquan Cao 1-2/+2
2024-01-22cxl/pci: Skip irq features if MSI/MSI-X are not supportedGravatar Ira Weiny 1-11/+15
2024-01-12cxl/core: use sysfs_emit() for attr's _show()Gravatar Shiyang Ruan 1-1/+1
2024-01-09Merge branch 'for-6.8/cxl-cper' into for-6.8/cxlGravatar Dan Williams 4-138/+124
2024-01-09cxl/pci: Register for and process CPER eventsGravatar Ira Weiny 3-13/+89
2024-01-09cxl/events: Create a CXL event unionGravatar Ira Weiny 2-23/+17
2024-01-09cxl/events: Separate UUID from event structuresGravatar Ira Weiny 1-1/+1
2024-01-09cxl/events: Remove passing a UUID to known event tracesGravatar Ira Weiny 2-15/+19
2024-01-09cxl/events: Create common event UUID definesGravatar Ira Weiny 2-27/+27
2024-01-05Merge branch 'for-6.7/cxl' into for-6.8/cxlGravatar Dan Williams 3-26/+14
2024-01-05Merge branch 'for-6.8/cxl-misc' into for-6.8/cxlGravatar Dan Williams 1-1/+1
2024-01-05Merge branch 'for-6.8/cxl-cdat' into for-6.8/cxlGravatar Dan Williams 6-27/+44
2024-01-05cxl/events: Promote CXL event structures to a core headerGravatar Ira Weiny 1-89/+1
2024-01-05cxl: Refactor to use __free() for cxl_root allocation in cxl_endpoint_port_pr...Gravatar Dave Jiang 1-3/+2
2024-01-05cxl: Refactor to use __free() for cxl_root allocation in cxl_find_nvdimm_brid...Gravatar Dave Jiang 1-5/+3
2024-01-05cxl: Fix device reference leak in cxl_port_perf_data_calculate()Gravatar Dave Jiang 1-2/+5
2024-01-05cxl: Convert find_cxl_root() to return a 'struct cxl_root *'Gravatar Dave Jiang 6-23/+28
2024-01-05cxl: Introduce put_cxl_root() helperGravatar Dave Jiang 2-0/+12
2024-01-04cxl/port: Fix missing target list lockGravatar Dan Williams 2-17/+7
2024-01-04cxl/port: Fix decoder initialization when nr_targets > interleave_waysGravatar Huang Ying 1-1/+1
2024-01-03cxl/region: fix x9 interleave typoGravatar Jim Harris 1-1/+1
2024-01-03cxl/trace: Pass UUID explicitly to event tracesGravatar Ira Weiny 2-18/+18
2024-01-02Merge branch 'for-6.8/cxl-cdat' into for-6.8/cxlGravatar Dan Williams 17-39/+1009
2024-01-02cxl/region: use %pap format to print resource_size_tGravatar Randy Dunlap 1-2/+2
2023-12-24cxl/region: Add dev_dbg() detail on failure to allocate HPA spaceGravatar Alison Schofield 1-2/+3
2023-12-22cxl: Check qos_class validity on memdev probeGravatar Dave Jiang 1-0/+103
2023-12-22cxl: Export sysfs attributes for memory device QoS classGravatar Dave Jiang 1-6/+61
2023-12-22cxl: Store QTG IDs and related info to the CXL memory device contextGravatar Dave Jiang 3-0/+92
2023-12-22cxl: Compute the entire CXL path latency and bandwidth dataGravatar Dave Jiang 1-1/+58
2023-12-22cxl: Add helper function that calculate performance data for downstream portsGravatar Dave Jiang 2-0/+78
2023-12-22cxl: Store the access coordinates for the generic portsGravatar Dave Jiang 2-0/+27
2023-12-22cxl: Calculate and store PCI link latency for the downstream portsGravatar Dave Jiang 5-0/+61
2023-12-22cxl: Add support for _DSM Function for retrieving QTG IDGravatar Dave Jiang 3-13/+193
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