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path: root/drivers/dma/hsu
AgeCommit message (Expand)AuthorFilesLines
2022-09-04dmaengine: hsu: Include headers we are direct user ofGravatar Andy Shevchenko 3-1/+13
2022-09-04dmaengine: hsu: Use GENMASK() consistentlyGravatar Andy Shevchenko 1-3/+4
2022-09-04dmaengine: hsu: using for_each_set_bit to simplify the codeGravatar Andy Shevchenko 1-11/+8
2022-09-04dmaengine: hsu: Finish conversion to managed resourcesGravatar Andy Shevchenko 1-15/+12
2021-10-26dmaengine: hsu: switch from 'pci_' to 'dma_' APIGravatar Qing Wang 1-5/+1
2021-05-31dmaengine: hsu: Account transferred bytesGravatar Andy Shevchenko 1-0/+3
2021-01-13dmaengine: hsu: disable spurious interruptGravatar Ferry Toth 1-10/+11
2019-07-17Merge tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dmaGravatar Linus Torvalds 1-2/+2
2019-06-25dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width"Gravatar Andy Shevchenko 1-2/+2
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Gravatar Thomas Gleixner 3-12/+3
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigGravatar Thomas Gleixner 2-0/+2
2018-10-07dmaengine: hsu: remove dma_slave_config direction usageGravatar Vinod Koul 1-4/+0
2018-07-10dmaengine: hsu: Support dmaengine_terminate_sync()Gravatar Andy Shevchenko 1-0/+8
2017-01-19serial: 8250_mid: handle interrupt correctly in DMA caseGravatar Andy Shevchenko 1-2/+15
2016-11-25dmaengine: hsu: pci: switch to new API for IRQ allocationGravatar Andy Shevchenko 1-3/+5
2016-09-02dmaengine: hsu: refactor hsu_dma_do_irq() to return intGravatar Andy Shevchenko 2-8/+7
2016-06-25dmaengine: hsu: Export hsu_dma_get_status()Gravatar Chuah, Kim Tatt 2-23/+78
2016-05-19Merge tag 'dmaengine-4.7-rc1' of git://git.infradead.org/users/vkoul/slave-dmaGravatar Linus Torvalds 2-3/+9
2016-04-04dmaengine: hsu: set maximum allowed segment size for DMAGravatar Andy Shevchenko 2-0/+6
2016-04-04dmaengine: hsu: don't check direction of timeouted channelGravatar Andy Shevchenko 1-1/+1
2016-04-04dmaengine: hsu: allow more than 3 descriptorsGravatar Andy Shevchenko 1-2/+2
2016-04-04dmaengine: hsu: correct use of channel status registerGravatar Andy Shevchenko 2-1/+4
2016-04-04dmaengine: hsu: correct residue calculation of active descriptorGravatar Andy Shevchenko 1-2/+5
2016-04-04dmaengine: hsu: set HSU_CH_MTSR to memory widthGravatar Andy Shevchenko 1-2/+2
2015-12-05dmaengine: hsu: speed up residue calculationGravatar Andy Shevchenko 2-13/+5
2015-10-17dmaengine: hsu: remove platform dataGravatar Heikki Krogerus 3-18/+9
2015-10-17dmaengine: hsu: make the UART driver in control of selecting this driverGravatar Heikki Krogerus 1-7/+2
2015-07-16dmaengine: hsu: remove excessive lockGravatar Andy Shevchenko 2-36/+4
2015-06-02dmaengine: hsu: Fix memory leak when stopping a running transferGravatar Peter Ujfalusi 1-1/+4
2015-04-22dmaengine: hsu: don't prompt for hsu_core partGravatar Vinod Koul 1-1/+1
2015-03-26dmaengine: hsu: move memory allocation to GFP_NOWAITGravatar Andy Shevchenko 1-2/+2
2015-03-26dmaengine: hsu: remove redundant pieces of codeGravatar Andy Shevchenko 1-11/+2
2015-03-26dmaengine: hsu: add Intel Tangier PCI IDGravatar Andy Shevchenko 1-0/+1
2015-03-07dmaengine: append hsu DMA driverGravatar Andy Shevchenko 5-0/+764