aboutsummaryrefslogtreecommitdiff
path: root/drivers/net/dsa
AgeCommit message (Expand)AuthorFilesLines
2016-02-16net: dsa: mv88e6xxx: Add support for Marvell 88E6240Gravatar Sascha Hauer 1-0/+1
2016-02-13net: dsa: mv88e6xxx: do not leave reserved VLANsGravatar Vivien Didelot 1-15/+10
2016-02-13net: dsa: mv88e6xxx: fix software VLAN deletionGravatar Vivien Didelot 1-1/+1
2016-01-29net: dsa: mv88e6xxx: fix port VLAN mapsGravatar Vivien Didelot 1-1/+2
2016-01-25net: dsa: fix mv88e6xxx switchesGravatar Russell King 1-1/+1
2015-12-23dsa: mv88e6xxx: Add Second back of statisticsGravatar Andrew Lunn 2-109/+129
2015-11-23dsa: mv88e6xxx.c: Hardware reset the chip if availableGravatar Andrew Lunn 1-0/+10
2015-11-15net: dsa: mv88e6060: replace magic values with register definesGravatar Neil Armstrong 1-27/+37
2015-11-15net: dsa: mv88e6060: add register defines header fileGravatar Neil Armstrong 1-0/+111
2015-11-15net: dsa: mv88e6060: use the correct bit shift for mac0Gravatar Neil Armstrong 1-1/+2
2015-11-15net: dsa: mv88e6060: use the correct MaxFrameSize bitGravatar Neil Armstrong 1-1/+1
2015-11-15net: dsa: mv88e6060: use the correct InitReady bitGravatar Neil Armstrong 1-1/+1
2015-11-15net: dsa: mv88e6060: remove poll_link callbackGravatar Neil Armstrong 1-49/+0
2015-11-05net: dsa: mv88e6xxx: isolate unbridged portsGravatar Vivien Didelot 4-0/+48
2015-11-03net: dsa: mv88e6xxx: include DSA ports in VLANsGravatar Vivien Didelot 1-6/+6
2015-11-03net: dsa: mv88e6xxx: disable SA learning for DSA and CPU portsGravatar Andrew Lunn 2-2/+11
2015-11-02net: dsa: mv88e6xxx: lookup switch nameGravatar Vivien Didelot 6-112/+95
2015-11-02net: dsa: mv88e6xxx: assert SMI lockGravatar Vivien Didelot 1-11/+14
2015-11-01net: dsa: use switchdev obj for VLAN add/del opsGravatar Vivien Didelot 4-27/+97
2015-10-26net: dsa: bcm_sf2: Unhardcode port numbersGravatar Florian Fainelli 2-11/+97
2015-10-26net: dsa: bcm_sf2: Implement FDB operationsGravatar Florian Fainelli 3-0/+335
2015-10-23net: dsa: Make mv88e6060 use nested mdiobus read/writeGravatar Neil Armstrong 1-2/+2
2015-10-23net: dsa: Make mv88e6xxx use nested mdiobus read/writeGravatar Neil Armstrong 1-37/+9
2015-10-22net: dsa: mv88e6xxx: remove debugfs interfaceGravatar Vivien Didelot 2-293/+0
2015-10-22net: dsa: mv88e6xxx: remove port_fdb_getnextGravatar Vivien Didelot 4-77/+0
2015-10-22net: dsa: mv88e6xxx: implement port_fdb_dumpGravatar Vivien Didelot 4-0/+70
2015-10-22net: dsa: mv88e6xxx: write MAC outside of ATU Get Next codeGravatar Vivien Didelot 1-6/+5
2015-10-22net: dsa: mv88e6xxx: write VID outside of VTU Get Next codeGravatar Vivien Didelot 1-10/+29
2015-10-13net: dsa: mv88e6xxx: fix hardware bridgingGravatar Vivien Didelot 4-50/+3
2015-10-13net: dsa: mv88e6xxx: do not support per-port FIDGravatar Vivien Didelot 2-63/+11
2015-10-13net: dsa: mv88e6xxx: bridges do not need an FIDGravatar Vivien Didelot 2-110/+32
2015-10-11net: dsa: use switchdev obj in port_fdb_delGravatar Vivien Didelot 2-3/+3
2015-10-11net: dsa: push prepare phase in port_fdb_addGravatar Vivien Didelot 2-4/+7
2015-10-11net: dsa: add port_fdb_prepareGravatar Vivien Didelot 4-0/+15
2015-10-07net: dsa: mv88e6xxx: remove link pollingGravatar Russell King 6-72/+0
2015-10-02Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netGravatar David S. Miller 1-0/+2
2015-09-29dsa: mv88e6xxx: Fix unsigned/signed issueGravatar Andrew Lunn 1-1/+2
2015-09-29dsa: mv88e6xxx: Enable forwarding for unknown to the CPU portGravatar Andrew Lunn 1-0/+2
2015-09-26Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netGravatar David S. Miller 1-0/+1
2015-09-22net: dsa: actually force the speed on the CPU portGravatar Russell King 1-0/+1
2015-09-15net: dsa: mv88e6xxx: remove all MACs when disabling a portGravatar Vivien Didelot 1-1/+1
2015-09-15net: dsa: mv88e6xxx: remove addresses when a port leaves a VLANGravatar Vivien Didelot 1-0/+29
2015-09-15net: dsa: mv88e6xxx: flush all addresses when adding a VLANGravatar Vivien Didelot 1-1/+2
2015-09-15net: dsa: mv88e6xxx: flush ATU on initial setupGravatar Vivien Didelot 1-0/+5
2015-09-15net: dsa: mv88e6xxx: rework ATU Flush operationGravatar Vivien Didelot 2-13/+44
2015-09-15net: dsa: mv88e6xxx: extract ATU data write accessGravatar Vivien Didelot 1-19/+24
2015-09-15net: dsa: mv88e6xxx: extract FID write from ATU commandGravatar Vivien Didelot 1-9/+23
2015-09-09net: dsa: bcm_sf2: Fix 64-bits register writesGravatar Florian Fainelli 1-2/+2
2015-09-08net: dsa: bcm_sf2: Fix ageing conditions and operationGravatar Florian Fainelli 1-4/+8
2015-09-06net: dsa: mv88e6171: add hardware 802.1Q supportGravatar Vivien Didelot 1-0/+5
Copyright © 1990 – 2022 jet tsang zeon-git.
All Rights Reverse Engineered.