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2023-04-11soc: mediatek: Kconfig: Add MTK_CMDQ dependency to MTK_MMSYSGravatar AngeloGioacchino Del Regno 1-0/+1
The mtk-mmsys and mutex drivers do have a dependency on MTK_CMDQ, even though both can work with *or* without it: since CMDQ support can be enabled either as module or as built-in, it is necessary to add a depends rule in Kconfig, so that we disallow building both mtk-mmsys and mtk-mutex as built-in if mtk-cmdq-helper is built as a module, otherwise obvious linker issues appear. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230403093304.276418-1-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-04-02soc: mediatek: mutex: Use dev_err_probe()Gravatar Ye Xingchen 1-5/+2
Replace the open-code with dev_err_probe() to simplify the code. Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/202303241017290414354@zte.com.cn Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-04-02soc: mediatek: mtk-mmsys: Add support for MT6795 Helio X10Gravatar AngeloGioacchino Del Regno 1-0/+9
Add MMSYS support for the MT6795 SoC using the same mmsys routing table as MT8173 as, for the currently supported usecases (DSI0, DPI0 with no WDMA), these are identical. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230309102618.114157-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-04-02soc: mediatek: mtk-mmsys: Change MT8173 num_resets to 64Gravatar AngeloGioacchino Del Regno 1-1/+1
The MT8173 SoC has 64 MMSYS resets, split in two contiguous 32-bits registers, MMSYS_SW0_RST_B (0x140) and MMSYS_SW1_RST_B (0x144), as also stated in the downstream kernel for the Amazon Fire TV 2 (Sloane) in the ddp_reg.h header. Please note that managing more than 32 reset bits is supported since commit 2004f8be8483 ("soc: mediatek: mmsys: add mmsys for support 64 reset bits") This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230309102618.114157-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-04-02soc: mediatek: mtk-mmsys: Split out MT8173 mmsys DDP routing tableGravatar AngeloGioacchino Del Regno 3-3/+99
MT2701, MT2712 and MT8173 were relying on a "default" DDP I/O routing table, describing all of the possible connections between display block components: while this is definitely working it's suboptimal for the actual routing description, as we may be enabling outputs and inputs that are not needed, possibly impacting on actual DDP performance other than slightly prolonging boot times by having to parse a table that is bigger than needed. Seen that all of the other supported SoCs have got their own table and seen that a comment in mtk-mmsys.h explicitly mentions that the wanted way is to have one table per SoC, create a new routing table that is specifically tailored to MT8173 and, while at it, remove mentions to said SoC from the comment in mtk-mmsys.h. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230309102618.114157-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-04-02soc: mediatek: Cleanup ifdefs for IS_REACHABLE(CONFIG_MTK_CMDQ)Gravatar AngeloGioacchino Del Regno 2-25/+12
Now that the mtk-cmdq.h header contains inline functions for cases in which the driver is not enabled (either module or built-in), we can safely go on with cleaning up ifdefs for CMDQ handling. This also shows in a clearer manner that writing through CMDQ HW is optional and used only for performance purposes when/where wanted, needed and/or required. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230222094253.23678-10-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-04-02soc: mediatek: mtk-mutex: Use module_platform_driver() macroGravatar AngeloGioacchino Del Regno 1-13/+1
Replace open-coded init/exit calls with the module_platform_driver() macro being equivalent. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230222094253.23678-8-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-04-02soc: mediatek: mtk-mutex: Replace max handles number with definitionGravatar AngeloGioacchino Del Regno 1-4/+6
Replace the magic number "10", defining the maximum number of supported handles with a MTK_MUTEX_MAX_HANDLES definition. While at it, also change the type for `id` from a signed integer to a unsigned 8 bits integer to save some (small) memory footprint, as this number is never higher than 10. This cleanup brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230222094253.23678-7-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-04-02soc: mediatek: mtk-mutex: Compress of_device_id array entriesGravatar AngeloGioacchino Del Regno 1-27/+14
Compress entries of the of_match_mtk_mmsys array to reduce the amount of lines and increase readability; this brings us to a maximum of 95 columns. While at it, also add a sentinel comment to the last entry for the sole purpose of consistency. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230222094253.23678-6-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-04-02soc: mediatek: mtk-mmsys: Add MODULE_DEVICE_TABLE() to allow auto-loadGravatar AngeloGioacchino Del Regno 1-0/+1
Allow module auto-loading by adding a MODULE_DEVICE_TABLE for of_match_mmsys. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230222094253.23678-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-04-02soc: mediatek: mtk-mmsys: Compress of_device_id array entriesGravatar AngeloGioacchino Del Regno 1-65/+18
Compress entries of the of_match_mtk_mmsys array to reduce the amount of lines and increase readability; this brings us to a maximum of 90 columns. While at it, also add a sentinel comment to the last entry for the sole purpose of consistency. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230222094253.23678-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-04-02soc: mediatek: mtk-mmsys: Use module_platform_driver() macroGravatar AngeloGioacchino Del Regno 1-13/+1
Instead of open-coding init/exit calls, switch to using the module_platform_driver() macro instead, doing the exact same. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230222094253.23678-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-04-02soc: mediatek: mtk-mmsys: Add .remove() callbackGravatar AngeloGioacchino Del Regno 1-0/+15
Add a .remove() callback to correctly unregister the multimedia clocks and DRM drivers. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230222094253.23678-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-03-30soc: mediatek: mtk-svs: add thermal voltage compensation if neededGravatar Roger Lu 1-8/+9
Some extreme test environment may keep IC temperature very low or very high during system boot stage. For stability concern, we add thermal voltage compenstation if needed no matter svs bank phase is in init02 or mon mode. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230202124104.16504-4-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-03-30soc: mediatek: mtk-svs: fix passing zero to 'PTR_ERR'Gravatar Roger Lu 1-1/+1
nvmem_cell_get() cannot return NULL so checking for NULL is wrong here. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Fixes: 6c7174fd90a4690 ("soc: mediatek: mtk-svs: use svs get efuse common function") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <error27@gmail.com> Link: https://lore.kernel.org/r/202302160720.N64SWT4l-lkp@intel.com/ Link: https://lore.kernel.org/r/20230216132543.814-1-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-03-06soc: mediatek: mtk-svs: delete node name checkGravatar Matthias Brugger 1-5/+0
The function svs_add_device_link is called only internally from the SoC specific probe functions. We don't need to check if the node_name is null because that would mean that we have a buggy SoC probe function in the first place. Reviewed-by: Roger Lu <roger.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230209162403.21113-1-matthias.bgg@kernel.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-03-06soc: mediatek: mutex: support MT8195 VPPSYSGravatar Roy-CW.Yeh 1-0/+102
Add MT8195 VPPSYS0 and VPPSYS1 mutex info to driver data Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Change-Id: Ie371dc9dcf35ea308d9460acd60fb9c3d6475deb Link: https://lore.kernel.org/r/20230206091109.1324-7-moudy.ho@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-03-06soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1Gravatar Roy-CW.Yeh 1-7/+26
Add mtk_mutex_set_mod support to set MOD1 Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230206091109.1324-6-moudy.ho@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-03-06soc: mediatek: mmsys: add config api for RSZ switching and DCMGravatar Roy-CW.Yeh 2-0/+57
Due to MT8195 HW design, some RSZs have additional settings that need to be configured in MMSYS. Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Change-Id: I41978bf14951221c88abbe70d8c24cb0770e11e3 Link: https://lore.kernel.org/r/20230206091109.1324-5-moudy.ho@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-03-06soc: mediatek: mtk-svs: use common function to disable restore voltagesGravatar Roger Lu 1-32/+22
The timing of disabling SVS bank and restore default voltage is more than one place. Therefore, add a common function to use for removing the superfluous codes. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230202124104.16504-3-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-03-06soc: mediatek: mtk-svs: use svs get efuse common functionGravatar Roger Lu 1-46/+25
SVS might need to read both svs efuse and thermal efuse on the probe flow. Therefore, add a common efuse read function to remove the superfluous codes. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230202124104.16504-2-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-02-01soc: mediatek: mtk-svs: add missing MODULE_DEVICE_TABLEGravatar Zeng Heng 1-0/+1
This patch adds missing MODULE_DEVICE_TABLE definition which generates correct modalias for automatic loading of this driver when it is built as an external module. Signed-off-by: Zeng Heng <zengheng4@huawei.com> Link: https://lore.kernel.org/r/20220928151346.1942977-1-zengheng4@huawei.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-02-01soc: mediatek: mtk-devapc: Switch to devm_clk_get_enabled()Gravatar AngeloGioacchino Del Regno 1-9/+2
This driver does exactly devm_clk_get() and clk_prepare_enable() right after, which is exactly what devm_clk_get_enabled() does: clean that up by switching to the latter. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221006110935.59695-1-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-31soc: mtk-svs: mt8183: refactor o_slope calculationGravatar Roger Lu 1-29/+22
The o_slope value is dependent of the o_slope_sign, refactor code to get rid of unnecessary if constructs. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230111074528.29354-15-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-31soc: mediatek: mtk-svs: delete superfluous platform data entriesGravatar Matthias Brugger 1-10/+12
The platform name and efuse parsing function pointer are only used while probing the device. Use them from the svs_platform_data struct instead. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-12-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-31soc: mediatek: mtk-svs: move svs_platform_probe into probeGravatar Matthias Brugger 1-16/+4
Moving svs_platform_probe into driver probe function will allow us to reduce svs_platform members. This will be done in a follow-up patch. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-11-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-31soc: mediatek: mtk-svs: improve readability of platform_probeGravatar Matthias Brugger 1-4/+0
If a compatible misses a match data entry, then something is wrong in the development phase, we don't need to check for that at runtime. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-10-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-31soc: mediatek: mtk-svs: clean up platform probingGravatar Matthias Brugger 1-4/+1
We only ever call the SoC specific probe function from svs_platform_probe. No need to carry that function in a global datastructure around. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-9-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-31soc: mediatek: mtk-svs: keep svs alive if CONFIG_DEBUG_FS not supportedGravatar Roger Lu 1-0/+6
Some projects might not support CONFIG_DEBUG_FS but still needs svs to be alive. Therefore, enclose debug cmd codes with CONFIG_DEBUG_FS to make sure svs can be alive when CONFIG_DEBUG_FS not supported. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-8-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-31soc: mediatek: mtk-svs: Use pm_runtime_resume_and_get() in svs_init01()Gravatar Shang XiaoJing 1-1/+1
svs_init01() calls pm_runtime_get_sync() and added fail path as svs_init01_finish to put usage_counter. However, pm_runtime_get_sync() will increment usage_counter even it failed. Fix it by replacing it with pm_runtime_resume_and_get() to keep usage counter balanced. Fixes: 681a02e95000 ("soc: mediatek: SVS: introduce MTK SVS engine") Signed-off-by: Shang XiaoJing <shangxiaojing@huawei.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230111074528.29354-5-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-31soc: mediatek: mtk-svs: reset svs when svs_resume() failGravatar Roger Lu 1-1/+5
Add svs reset when svs_resume() fail. Fixes: a825d72f74a3 ("soc: mediatek: fix missing clk_disable_unprepare() on err in svs_resume()") Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-3-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-31soc: mediatek: mtk-svs: restore default voltages when svs_init02() failGravatar Roger Lu 1-2/+22
If svs init02 fail, it means we cannot rely on svs bank voltages anymore. We need to disable svs function and restore DVFS opp voltages back to the default voltages for making sure we have enough DVFS voltages. Fixes: 681a02e95000 ("soc: mediatek: SVS: introduce MTK SVS engine") Fixes: 0bbb09b2af9d ("soc: mediatek: SVS: add mt8192 SVS GPU driver") Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-2-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-30soc: mediatek: mmsys: add support for MT8195 VPPSYSGravatar Roy-CW.Yeh 2-0/+23
Add MT8195 VPPSYS0 and VPPSYS1 driver data. Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230118031509.29834-5-moudy.ho@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-30soc: mediatek: Introduce mediatek-regulator-coupler driverGravatar AngeloGioacchino Del Regno 3-0/+165
This driver currently deals with GPU-SRAM regulator coupling, ensuring that the SRAM voltage is always between a specific range of distance to the GPU voltage, depending on the SoC, necessary in order to achieve system stability across the full range of supported GPU frequencies. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com> Link: https://lore.kernel.org/r/20221006115816.66853-1-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-25soc: mediatek: mtk-svs: Enable the IRQ laterGravatar Ricardo Ribalda 1-8/+8
If the system does not come from reset (like when is booted via kexec()), the peripheral might triger an IRQ before the data structures are initialised. Fixes: [ 0.227710] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000f08 [ 0.227913] Call trace: [ 0.227918] svs_isr+0x8c/0x538 Signed-off-by: Ricardo Ribalda <ribalda@chromium.org> Link: https://lore.kernel.org/r/20221127-mtk-svs-v2-0-145b07663ea8@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-25soc: mediatek: add mtk-mutex support for mt8195 vdosys1Gravatar Nancy.Lin 1-0/+33
Add mtk-mutex support for mt8195 vdosys1. The vdosys1 path component contains ovl_adaptor, merge5, and dp_intf1. Ovl_adaptor is composed of several sub-elements which include MDP_RDMA0~7, MERGE0~3, and ETHDR. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20230113104434.28023-12-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-25soc: mediatek: add mtk-mutex component - dp_intf1Gravatar Nancy.Lin 1-0/+4
Add mtk-mutex DDP_COMPONENT_DP_INTF1 component. The MT8195 vdosys1 path component contains ovl_adaptor, merge5, and dp_intf1. It is a preparation for adding support for MT8195 vdosys1 path component. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20230113104434.28023-11-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-25soc: mediatek: mmsys: add reset control for MT8195 vdosys1Gravatar Nancy.Lin 2-0/+3
MT8195 vdosys1 has more than 32 reset bits and a different reset base than other chips. Add the number of reset bits and reset base in mmsys private data. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20230113104434.28023-10-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-25soc: mediatek: mmsys: add mmsys for support 64 reset bitsGravatar Nancy.Lin 2-13/+28
Add mmsys for support 64 reset bits. It is a preparation for MT8195 vdosys1 HW reset. MT8195 vdosys1 has more than 32 reset bits. 1. Add the number of reset bits in mmsys private data 2. move the whole "reset register code section" behind the "get mmsys->data" code section for getting the num_resets in mmsys->data. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20230113104434.28023-9-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-25soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1Gravatar Nancy.Lin 1-19/+44
Add cmdq support for mtk-mmsys config API. The mmsys config register settings need to take effect with the other HW settings(like OVL_ADAPTOR...) at the same vblanking time. If we use CPU to write the mmsys reg, we can't guarantee all the settings can be written in the same vblanking time. Cmdq is used for this purpose. We prepare all the related HW settings in one cmdq packet. The first command in the packet is "wait stream done", and then following with all the HW settings. After the cmdq packet is flush to GCE HW. The GCE waits for the "stream done event" to coming and then starts flushing all the HW settings. This can guarantee all the settings flush in the same vblanking. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20230113104434.28023-8-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-25soc: mediatek: add mtk-mmsys config API for mt8195 vdosys1Gravatar Nancy.Lin 2-0/+41
Add four mmsys config APIs. The config APIs are used for config mmsys reg. Some mmsys regs need to be set according to the HW engine binding to the mmsys simultaneously. 1. mtk_mmsys_merge_async_config: config merge async width/height. async is used for cross-clock domain synchronization. 2. mtk_mmsys_hdr_confing: config hdr backend async width/height. 3. mtk_mmsys_mixer_in_config and mtk_mmsys_mixer_in_config: config mixer related settings. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20230113104434.28023-7-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-25soc: mediatek: refine code to use mtk_mmsys_update_bits APIGravatar Nancy.Lin 1-29/+16
Simplify code for update mmsys reg. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20230113104434.28023-6-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-25soc: mediatek: add mtk-mmsys support for mt8195 vdosys1Gravatar Nancy.Lin 2-0/+149
Add mt8195 vdosys1 routing table to the driver data of mtk-mmsys. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20230113104434.28023-5-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-19soc: mediatek: pm-domains: Add buck isolation setting in power domainGravatar Allen-KH Cheng 2-0/+9
In some chipsets, we need to disable EXT_BUCK_ISO before turning on the specific power pm-domains (mtcmos), such as ADSP in MT8192 and CAM_VCORE in MT8188. Add the MTK_SCPD_EXT_BUCK_ISO flag to control the buck isolation setting in the mediatek power domain driver. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230117032640.13504-3-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-19soc: mediatek: pm-domains: Add buck isolation offset and mask to power ↵Gravatar Allen-KH Cheng 1-0/+4
domain data Add buck isolation offset and mask to power domain data. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230117032640.13504-2-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-19soc: mediatek: pm-domains: Add support for mt8188Gravatar Garmin.Chang 2-0/+628
Add domain control data including bus protection data size change due to more protection steps in mt8188. Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221223080553.9397-3-Garmin.Chang@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-09mtk-mmsys: Change mtk-mmsys & mtk-mutex to modulesGravatar Yongqiang Niu 3-3/+34
Change mtk-mmsys & mtk-mutex to modules for gki Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221118063018.13520-1-yongqiang.niu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-09soc: mediatek: mtk-pm-domains: Allow mt8186 ADSP default power onGravatar Tinghan Shen 1-3/+1
In the use case of configuring the access permissions of the ADSP core, the mt8186 SoC ADSP power will be switched on in the bootloader because the permission control registers are located in the ADSP subsys. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Fixes: 88590cbc1703 ("soc: mediatek: pm-domains: Add support for mt8186") Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221012075434.30009-1-tinghan.shen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-09soc: mediatek: add mtk-mutex support for mt8188 vdosys0Gravatar Nathan Lu 1-0/+53
add mtk-mutex support for mt8188 vdosys0. Signed-off-by: amy zhang <Amy.Zhang@mediatek.com> Signed-off-by: Nathan Lu <nathan.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221206020046.11333-6-nathan.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-09soc: mediatek: add mtk-mmsys support for mt8188 vdosys0Gravatar Nathan Lu 2-0/+160
1. add mt8188 mmsys 2. add mt8188 vdosys0 routing table settings Signed-off-by: amy zhang <Amy.Zhang@mediatek.com> Signed-off-by: Nathan Lu <nathan.lu@mediatek.com> Link: https://lore.kernel.org/r/20221206020046.11333-5-nathan.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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