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sifive
Age
Commit message (
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Author
Files
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2022-12-26
soc: sifive: ccache: Add StarFive JH7110 support
Emil Renner Berthing
1
-1
/
+1
2022-11-09
soc: sifive: ccache: fix missing of_node_put() in sifive_ccache_init()
Yang Yingliang
1
-4
/
+11
2022-11-09
soc: sifive: ccache: fix missing free_irq() in error path in sifive_ccache_in...
Yang Yingliang
1
-1
/
+4
2022-11-09
soc: sifive: ccache: fix missing iounmap() in error path in sifive_ccache_init()
Yang Yingliang
1
-4
/
+11
2022-10-13
soc: sifive: ccache: define the macro for the register shifts
Zong Li
1
-5
/
+11
2022-10-13
soc: sifive: ccache: use pr_fmt() to remove CCACHE: prefixes
Ben Dooks
1
-7
/
+10
2022-10-13
soc: sifive: ccache: reduce printing on init
Ben Dooks
1
-14
/
+11
2022-10-13
soc: sifive: ccache: determine the cache level from dts
Zong Li
1
-1
/
+5
2022-10-13
soc: sifive: ccache: Rename SiFive L2 cache to Composable cache.
Greentime Hu
4
-241
/
+249
2021-01-07
RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740
Yash Shah
1
-3
/
+24
2020-05-28
soc: sifive: l2 cache: Mark l2_get_priv_group as static
Palmer Dabbelt
1
-1
/
+1
2020-05-28
soc: sifive: l2 cache: Eliminate an unsigned zero compare warning
Palmer Dabbelt
1
-1
/
+1
2020-05-20
riscv: Add support to determine no. of L2 cache way enabled
Yash Shah
1
-0
/
+38
2020-01-12
riscv: move sifive_l2_cache.h to include/soc
Yash Shah
1
-1
/
+1
2019-12-20
riscv: move sifive_l2_cache.c to drivers/soc
Christoph Hellwig
3
-0
/
+191