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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/aspeed,ast2400-wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Aspeed watchdog timer controllers
maintainers:
- Andrew Jeffery <andrew@codeconstruct.com.au>
properties:
compatible:
enum:
- aspeed,ast2400-wdt
- aspeed,ast2500-wdt
- aspeed,ast2600-wdt
reg:
maxItems: 1
clocks:
maxItems: 1
description: >
The clock used to drive the watchdog counter. From the AST2500 no source
other than the 1MHz clock can be selected, so the clocks property is
optional.
aspeed,reset-type:
$ref: /schemas/types.yaml#/definitions/string
enum:
- cpu
- soc
- system
- none
default: system
description: >
The watchdog can be programmed to generate one of three different types of
reset when a timeout occcurs.
Specifying 'cpu' will only reset the processor on a timeout event.
Specifying 'soc' will reset a configurable subset of the SoC's controllers
on a timeout event. Controllers critical to the SoC's operation may remain
untouched. The set of SoC controllers to reset may be specified via the
aspeed,reset-mask property if the node has the aspeed,ast2500-wdt or
aspeed,ast2600-wdt compatible.
Specifying 'system' will reset all controllers on a timeout event, as if
EXTRST had been asserted.
Specifying 'none' will cause the timeout event to have no reset effect.
Another watchdog engine on the chip must be used for chip reset operations.
aspeed,alt-boot:
$ref: /schemas/types.yaml#/definitions/flag
description: >
Direct the watchdog to configure the SoC to boot from the alternative boot
region if a timeout occurs.
aspeed,external-signal:
$ref: /schemas/types.yaml#/definitions/flag
description: >
Assert the timeout event on an external signal pin associated with the
watchdog controller instance. The pin must be muxed appropriately.
aspeed,ext-pulse-duration:
$ref: /schemas/types.yaml#/definitions/uint32
description: >
The duration, in microseconds, of the pulse emitted on the external signal
pin.
aspeed,ext-push-pull:
$ref: /schemas/types.yaml#/definitions/flag
description: >
If aspeed,external-signal is specified in the node, set the external
signal pin's drive type to push-pull. If aspeed,ext-push-pull is not
specified then the pin is configured as open-drain.
aspeed,ext-active-high:
$ref: /schemas/types.yaml#/definitions/flag
description: >
If both aspeed,external-signal and aspeed,ext-push-pull are specified in
the node, set the pulse polarity to active-high. If aspeed,ext-active-high
is not specified then the pin is configured as active-low.
aspeed,reset-mask:
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 1
maxItems: 2
description: >
A bitmask indicating which peripherals will be reset if the watchdog
timer expires. On AST2500 SoCs this should be a single word defined using
the AST2500_WDT_RESET_* macros; on AST2600 SoCs this should be a two-word
array with the first word defined using the AST2600_WDT_RESET1_* macros,
and the second word defined using the AST2600_WDT_RESET2_* macros.
required:
- compatible
- reg
allOf:
- if:
anyOf:
- required:
- aspeed,ext-push-pull
- required:
- aspeed,ext-active-high
- required:
- aspeed,reset-mask
then:
properties:
compatible:
enum:
- aspeed,ast2500-wdt
- aspeed,ast2600-wdt
- if:
required:
- aspeed,ext-active-high
then:
required:
- aspeed,ext-push-pull
additionalProperties: false
examples:
- |
watchdog@1e785000 {
compatible = "aspeed,ast2400-wdt";
reg = <0x1e785000 0x1c>;
aspeed,reset-type = "system";
aspeed,external-signal;
};
- |
#include <dt-bindings/watchdog/aspeed-wdt.h>
watchdog@1e785040 {
compatible = "aspeed,ast2600-wdt";
reg = <0x1e785040 0x40>;
aspeed,reset-type = "soc";
aspeed,reset-mask = <AST2600_WDT_RESET1_DEFAULT
(AST2600_WDT_RESET2_DEFAULT & ~AST2600_WDT_RESET2_LPC)>;
};
|
