aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/imx6qdl-vicut1.dtsi
blob: 1ac7e13249d2e83ee1aba066e065c17f022c4565 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright (c) 2014 Protonic Holland
 * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
 */

#include <dt-bindings/display/sdtv-standards.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/media/tvp5150.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>

/ {
	chosen {
		stdout-path = &uart4;
	};

	backlight: backlight {
		compatible = "pwm-backlight";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_backlight>;
		pwms = <&pwm1 0 5000000 0>;
		brightness-levels = <0 16 64 255>;
		num-interpolated-steps = <16>;
		default-brightness-level = <1>;
		power-supply = <&reg_3v3>;
		enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
	};

	connector {
		compatible = "composite-video-connector";
		label = "Composite0";
		sdtv-standards = <SDTV_STD_PAL_B>;

		port {
			comp0_out: endpoint {
				remote-endpoint = <&tvp5150_comp0_in>;
			};
		};
	};

	counter-0 {
		compatible = "interrupt-counter";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_counter0>;
		gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
	};

	counter-1 {
		compatible = "interrupt-counter";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_counter1>;
		gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
	};

	counter-2 {
		compatible = "interrupt-counter";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_counter2>;
		gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
	};

	gpio-keys {
		compatible = "gpio-keys";
		autorepeat;

		power {
			label = "Power Button";
			gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			wakeup-source;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_leds>;

		led-0 {
			label = "LED_DI0_DEBUG_0";
			function = LED_FUNCTION_HEARTBEAT;
			gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};

		led-1 {
			label = "LED_DI0_DEBUG_1";
			function = LED_FUNCTION_DISK;
			gpios = <&gpio4 17 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "disk-activity";
		};

		led-2 {
			label = "POWER_LED";
			function = LED_FUNCTION_POWER;
			gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};
	};

	panel {
		compatible = "kyo,tcg121xglp";
		backlight = <&backlight>;
		power-supply = <&reg_3v3>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};

	reg_1v8: regulator-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	reg_3v3: regulator-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_otg_vbus: regulator-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "otg-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_wifi: regulator-wifi {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wifi_npd>;
		regulator-name = "wifi";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		startup-delay-us = <70000>;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "prti6q-sgtl5000";
		simple-audio-card,format = "i2s";
		simple-audio-card,widgets =
			"Microphone", "Microphone Jack",
			"Line", "Line In Jack",
			"Headphone", "Headphone Jack",
			"Speaker", "External Speaker";
		simple-audio-card,routing =
			"MIC_IN", "Microphone Jack",
			"LINE_IN", "Line In Jack",
			"Headphone Jack", "HP_OUT",
			"External Speaker", "LINE_OUT";

		simple-audio-card,cpu {
			sound-dai = <&ssi1>;
			system-clock-frequency = <0>; /* Do NOT call fsl_ssi_set_dai_sysclk! */
		};

		simple-audio-card,codec {
			sound-dai = <&codec>;
			bitclock-master;
			frame-master;
		};
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";

	mux-ssi1 {
		fsl,audmux-port = <0>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN		0
			IMX_AUDMUX_V2_PTCR_TFSEL(2)	0
			IMX_AUDMUX_V2_PTCR_TCSEL(2)	0
			IMX_AUDMUX_V2_PTCR_TFSDIR	0
			IMX_AUDMUX_V2_PTCR_TCLKDIR	IMX_AUDMUX_V2_PDCR_RXDSEL(2)
		>;
	};

	mux-pins3 {
		fsl,audmux-port = <2>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN		IMX_AUDMUX_V2_PDCR_RXDSEL(0)
			0				IMX_AUDMUX_V2_PDCR_TXRXEN
		>;
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
	termination-ohms = <150>;
	status = "okay";
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can2>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
};

&ecspi1 {
	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <20000000>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	phy-handle = <&rgmii_phy>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		/* Microchip KSZ9031RNX PHY */
		rgmii_phy: ethernet-phy@0 {
			reg = <0>;
			interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>;
			reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
			reset-assert-us = <10000>;
			reset-deassert-us = <300>;
		};
	};
};

&gpio1 {
	gpio-line-names =
		"CAN1_TERM", "SD1_CD", "ITU656_RESET", "CAM1_MIRROR",
			"CAM2_MIRROR", "", "", "SMBALERT",
		"DEBUG_0", "DEBUG_1", "SDIO_SCK", "SDIO_CMD", "SDIO_D3",
			"SDIO_D2", "SDIO_D1", "SDIO_D0",
		"SD1_DATA0", "SD1_DATA1", "SD1_CMD", "SD1_DATA2", "SD1_CLK",
			"SD1_DATA3", "", "",
		"", "ETH_RESET", "WIFI_PD", "WIFI_BT_RST", "ETH_INT", "",
			"WL_IRQ", "ETH_MDC";
};

&gpio2 {
	gpio-line-names =
		"count0", "count1", "count2", "", "", "", "", "",
		"REV_ID0", "REV_ID1", "REV_ID2", "REV_ID3", "REV_ID4",
			"BOARD_ID0", "BOARD_ID1", "BOARD_ID2",
		"", "", "", "", "", "", "", "ON_SWITCH",
		"POWER_LED", "", "ECSPI2_SS0", "", "", "", "", "";
};

&gpio3 {
	gpio-line-names =
		"", "", "", "", "", "", "", "",
		"", "", "", "", "", "", "", "",
		"ECSPI1_SCLK", "ECSPI1_MISO", "ECSPI1_MOSI", "ECSPI1_SS1",
			"CPU_ON1_FB", "USB_OTG_OC", "USB_OTG_PWR", "YACO_IRQ",
		"", "", "", "", "", "", "", "";
};

&gpio4 {
	gpio-line-names =
		"", "", "", "", "", "", "UART4_TXD", "UART4_RXD",
		"UART5_TXD", "UART5_RXD", "CAN1_TX", "CAN1_RX", "CAN1_SR",
			"CAN2_SR", "CAN2_TX", "CAN2_RX",
		"LED_DI0_DEBUG_0", "LED_DI0_DEBUG_1", "", "", "", "", "", "",
		"", "", "", "", "BL_EN", "BL_PWM", "", "";
};

&gpio5 {
	gpio-line-names =
		"", "", "", "", "", "PCIE_WAKE", "PCIE_CLKREQ", "PCIE_W_DIS",
		"PCIE_RESET", "", "", "", "", "", "", "",
		"", "", "ITU656_CLK", "I2S_MCLK", "ITU656_PDN", "AUDIO_RESET",
			"I2S_BITCLK", "I2S_DOUT",
		"I2S_LRCLK", "I2S_DIN", "I2C1_SDA", "I2C1_SCL", "YACO_AUX_RX",
			"YACO_AUX_TX", "ITU656_D0", "ITU656_D1";
};

&gpio6 {
	gpio-line-names =
		"ITU656_D2", "ITU656_D3", "ITU656_D4", "ITU656_D5",
			"ITU656_D6", "ITU656_D7", "", "",
		"", "", "", "", "", "", "", "",
		"", "", "", "RGMII_TXC", "RGMII_TD0", "RGMII_TD1", "RGMII_TD2",
			"RGMII_TD3",
		"RGMII_RX_CTL", "RGMII_RD0", "RGMII_TX_CTL", "RGMII_RD1",
			"RGMII_RD2", "RGMII_RD3", "", "";
};

&gpio7 {
	gpio-line-names =
		"EMMC_DAT5", "EMMC_DAT4", "EMMC_CMD", "EMMC_CLK", "EMMC_DAT0",
			"EMMC_DAT1", "EMMC_DAT2", "EMMC_DAT3",
		"EMMC_RST", "", "", "", "CAM_DETECT", "", "", "",
		"", "EMMC_DAT7", "EMMC_DAT6", "", "", "", "", "",
		"", "", "", "", "", "", "", "";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	codec: audio-codec@a {
		compatible = "fsl,sgtl5000";
		reg = <0xa>;
		#sound-dai-cells = <0>;
		clocks = <&clks 201>;
		VDDA-supply = <&reg_3v3>;
		VDDIO-supply = <&reg_3v3>;
		VDDD-supply = <&reg_1v8>;
	};

	video-decoder@5c {
		compatible = "ti,tvp5150";
		reg = <0x5c>;
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;

			tvp5150_comp0_in: endpoint {
				remote-endpoint = <&comp0_out>;
			};
		};

		/* Output port 2 is video output pad */
		port@2 {
			reg = <2>;

			tvp5151_to_ipu1_csi0_mux: endpoint {
				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	adc@49 {
		compatible = "ti,ads1015";
		reg = <0x49>;
		#address-cells = <1>;
		#size-cells = <0>;

		channel@4 {
			reg = <4>;
			ti,gain = <3>;
			ti,datarate = <3>;
		};

		channel@5 {
			reg = <5>;
			ti,gain = <3>;
			ti,datarate = <3>;
		};

		channel@6 {
			reg = <6>;
			ti,gain = <3>;
			ti,datarate = <3>;
		};

		channel@7 {
			reg = <7>;
			ti,gain = <3>;
			ti,datarate = <3>;
		};
	};

	rtc@51 {
		compatible = "nxp,pcf8563";
		reg = <0x51>;
	};

	temperature-sensor@70 {
		compatible = "ti,tmp103";
		reg = <0x70>;
	};
};

&ipu1_csi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ipu1_csi0>;
	status = "okay";
};

&ipu1_csi0_mux_from_parallel_sensor {
	remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>;
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		status = "okay";

		port@4 {
			reg = <4>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};
};

&pcie {
	status = "okay";
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&ssi1 {
	#sound-dai-cells = <0>;
	fsl,mode = "ac97-slave";
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbh1 {
	pinctrl-names = "default";
	phy_type = "utmi";
	dr_mode = "host";
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	phy_type = "utmi";
	dr_mode = "host";
	disable-over-current;
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
	no-1-8-v;
	disable-wp;
	cap-sd-highspeed;
	no-mmc;
	no-sdio;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	vmmc-supply = <&reg_wifi>;
	non-removable;
	cap-power-off-card;
	keep-power-in-suspend;
	no-1-8-v;
	no-mmc;
	no-sd;
	status = "okay";

	wifi {
		compatible = "ti,wl1271";
		interrupts-extended = <&gpio1 30 IRQ_TYPE_LEVEL_HIGH>;
		ref-clock-frequency = "38400000";
		tcxo-clock-frequency = "19200000";
	};
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <8>;
	no-1-8-v;
	non-removable;
	no-sd;
	no-sdio;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			/* SGTL5000 sys_mclk */
			MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1			0x030b0
			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD			0x130b0
			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC			0x130b0
			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD			0x110b0
			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS			0x130b0
		>;
	};

	pinctrl_backlight: backlightgrp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28		0x1b0b0
		>;
	};

	pinctrl_can1: can1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX		0x1b000
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX		0x3008
			/* CAN1_SR */
			MX6QDL_PAD_KEY_COL3__GPIO4_IO12			0x13008
			/* CAN1_TERM */
			MX6QDL_PAD_GPIO_0__GPIO1_IO00			0x1b088
		>;
	};

	pinctrl_can2: can2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX		0x1b000
			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX		0x3008
			/* CAN2_SR */
			MX6QDL_PAD_KEY_ROW3__GPIO4_IO13			0x13008
		>;
	};

	pinctrl_counter0: counter0grp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D0__GPIO2_IO00			0x1b000
		>;
	};

	pinctrl_counter1: counter1grp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D1__GPIO2_IO01			0x1b000
		>;
	};

	pinctrl_counter2: counter2grp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D2__GPIO2_IO02			0x1b000
		>;
	};

	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D17__ECSPI1_MISO			0x100b1
			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI			0x100b1
			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK			0x100b1
			/* CS */
			MX6QDL_PAD_EIM_D19__GPIO3_IO19			0x000b1
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC			0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0			0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1			0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2			0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3			0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL		0x1b030
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC			0x10030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0			0x10030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1			0x10030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2			0x10030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3			0x10030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL		0x10030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK		0x10030
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO			0x10030
			MX6QDL_PAD_ENET_MDC__ENET_MDC			0x10030
			/* Phy reset */
			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25		0x1b0b0
			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28		0x1b0b1
		>;
	};

	pinctrl_hog: hoggrp {
		fsl,pins = <
			/* ITU656_nRESET */
			MX6QDL_PAD_GPIO_2__GPIO1_IO02			0x1b0b0
			/* CAM1_MIRROR */
			MX6QDL_PAD_GPIO_3__GPIO1_IO03			0x130b0
			/* CAM2_MIRROR */
			MX6QDL_PAD_GPIO_4__GPIO1_IO04			0x130b0
			/* CAM_nDETECT */
			MX6QDL_PAD_GPIO_17__GPIO7_IO12			0x1b0b0
			/* nON_SWITCH */
			MX6QDL_PAD_EIM_CS0__GPIO2_IO23			0x1b0b0
			/* ISB_IN1 */
			MX6QDL_PAD_EIM_A16__GPIO2_IO22			0x130b0
			/* ISB_nIN2 */
			MX6QDL_PAD_EIM_A17__GPIO2_IO21			0x1b0b0
			/* WARN_LIGHT */
			MX6QDL_PAD_EIM_A19__GPIO2_IO19			0x100b0
			/* ON2_FB */
			MX6QDL_PAD_EIM_A25__GPIO5_IO02			0x100b0
			/* YACO_nIRQ */
			MX6QDL_PAD_EIM_D23__GPIO3_IO23			0x1b0b0
			/* YACO_BOOT0 */
			MX6QDL_PAD_EIM_D30__GPIO3_IO30			0x130b0
			/* YACO_nRESET */
			MX6QDL_PAD_EIM_D31__GPIO3_IO31			0x1b0b0
			/* FORCE_ON1 */
			MX6QDL_PAD_EIM_EB2__GPIO2_IO30			0x1b0b0
			/* AUDIO_nRESET */
			MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21		0x1f0b0
			/* ITU656_nPDN */
			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20		0x1b0b0

			/* HW revision detect */
			/* REV_ID0 */
			MX6QDL_PAD_SD4_DAT0__GPIO2_IO08			0x1b0b0
			/* REV_ID1 */
			MX6QDL_PAD_SD4_DAT1__GPIO2_IO09			0x1b0b0
			/* REV_ID2 */
			MX6QDL_PAD_SD4_DAT2__GPIO2_IO10			0x1b0b0
			/* REV_ID3 */
			MX6QDL_PAD_SD4_DAT3__GPIO2_IO11			0x1b0b0
			/* REV_ID4 */
			MX6QDL_PAD_SD4_DAT4__GPIO2_IO12			0x1b0b0

			/* New in HW revision 1 */
			/* ON1_FB */
			MX6QDL_PAD_EIM_D20__GPIO3_IO20			0x100b0
			/* DIP1_FB */
			MX6QDL_PAD_DI0_PIN2__GPIO4_IO18			0x1b0b0

			/* New in UT2: FIXME: ISB PWM should start off, PD */
			/* ISB_LED_PWM */
			MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30		0x130b0
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001f8b1
			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001f8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_ipu1_csi0: ipu1csi0grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12		0x1b0b0
			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13		0x1b0b0
			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14		0x1b0b0
			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15		0x1b0b0
			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16		0x1b0b0
			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17		0x1b0b0
			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18		0x1b0b0
			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19		0x1b0b0
			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK	0x1b0b0
		>;
	};

	pinctrl_leds: ledsgrp {
		fsl,pins = <
			/* DEBUG0 */
			MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16		0x1b0b0
			/* DEBUG1 */
			MX6QDL_PAD_DI0_PIN15__GPIO4_IO17		0x1b0b0
			/* POWER_LED */
			MX6QDL_PAD_EIM_CS1__GPIO2_IO24			0x1b0b0
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT8__PWM1_OUT			0x1b0b0
		>;
	};

	/* YaCO AUX Uart */
	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA		0x1b0b1
			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA		0x1b0b1
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D26__UART2_RX_DATA		0x1b0b1
			MX6QDL_PAD_EIM_D27__UART2_TX_DATA		0x1b0b1
			MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B		0x1b0b1
			MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B		0x1b0b1
		>;
	};

	/* YaCO Touchscreen UART */
	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA		0x1b0b1
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA		0x1b0b1
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA		0x1b0b1
			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA		0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA		0x1b0b1
			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA		0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__USB_OTG_OC			0x1b0b0
			/* power enable, high active */
			MX6QDL_PAD_EIM_D22__GPIO3_IO22			0x1b0b0
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD			0x170f9
			MX6QDL_PAD_SD1_CLK__SD1_CLK			0x100f9
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0			0x170f9
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1			0x170f9
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2			0x170f9
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3			0x170f9
			MX6QDL_PAD_GPIO_1__GPIO1_IO01			0x1b0b0
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX6QDL_PAD_SD2_CMD__SD2_CMD			0x170b9
			MX6QDL_PAD_SD2_CLK__SD2_CLK			0x100b9
			MX6QDL_PAD_SD2_DAT0__SD2_DATA0			0x170b9
			MX6QDL_PAD_SD2_DAT1__SD2_DATA1			0x170b9
			MX6QDL_PAD_SD2_DAT2__SD2_DATA2			0x170b9
			MX6QDL_PAD_SD2_DAT3__SD2_DATA3			0x170b9
			/* WL12xx IRQ */
			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30		0x10880
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD			0x17099
			MX6QDL_PAD_SD3_CLK__SD3_CLK			0x10099
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0			0x17099
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1			0x17099
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2			0x17099
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3			0x17099
			MX6QDL_PAD_SD3_DAT4__SD3_DATA4			0x17099
			MX6QDL_PAD_SD3_DAT5__SD3_DATA5			0x17099
			MX6QDL_PAD_SD3_DAT6__SD3_DATA6			0x17099
			MX6QDL_PAD_SD3_DAT7__SD3_DATA7			0x17099
			MX6QDL_PAD_SD3_RST__SD3_RESET			0x1b0b1
		>;
	};

	pinctrl_wifi_npd: wifinpdgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26		0x1b8b0
		>;
	};
};