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author | 2019-06-18 17:03:57 +0300 | |
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committer | 2019-06-25 19:49:18 +0200 | |
commit | 0ef6b01d024c24fad307b277cfa4a2be7d25dc29 (patch) | |
tree | 05aab71c90a634168a29b9b45cc04b9b8bb2b93c /drivers/clocksource | |
parent | clocksource/drivers/tegra: Restore base address before cleanup (diff) | |
download | linux-0ef6b01d024c24fad307b277cfa4a2be7d25dc29.tar.gz linux-0ef6b01d024c24fad307b277cfa4a2be7d25dc29.tar.bz2 linux-0ef6b01d024c24fad307b277cfa4a2be7d25dc29.zip |
clocksource/drivers/tegra: Cycles can't be 0
Tegra's timer uses n+1 scheme for the counter, i.e. timer will fire after
one tick if 0 is loaded. The minimum and maximum numbers of oneshot ticks
are defined by clockevents_config_and_register(min, max) invocation and
the min value is set to 1 tick. Hence "cycles" value can't ever be 0,
unless it's a bug in clocksource core.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource')
-rw-r--r-- | drivers/clocksource/timer-tegra.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c index 8e70f38f1898..a907e71065bd 100644 --- a/drivers/clocksource/timer-tegra.c +++ b/drivers/clocksource/timer-tegra.c @@ -56,9 +56,16 @@ static int tegra_timer_set_next_event(unsigned long cycles, { void __iomem *reg_base = timer_of_base(to_timer_of(evt)); - writel_relaxed(TIMER_PTV_EN | - ((cycles > 1) ? (cycles - 1) : 0), /* n+1 scheme */ - reg_base + TIMER_PTV); + /* + * Tegra's timer uses n+1 scheme for the counter, i.e. timer will + * fire after one tick if 0 is loaded. + * + * The minimum and maximum numbers of oneshot ticks are defined + * by clockevents_config_and_register(1, 0x1fffffff + 1) invocation + * below in the code. Hence the cycles (ticks) can't be outside of + * a range supportable by hardware. + */ + writel_relaxed(TIMER_PTV_EN | (cycles - 1), reg_base + TIMER_PTV); return 0; } |