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path: root/drivers/phy/cadence
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2021-12-27phy: cadence: Sierra: Add support for derived reference clock outputGravatar Swapnil Jakhade 1-1/+108
2021-12-27phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configurationGravatar Swapnil Jakhade 1-1/+376
2021-12-27phy: cadence: Sierra: Add support for PHY multilink configurationsGravatar Swapnil Jakhade 1-8/+190
2021-12-27phy: cadence: Sierra: Fix to get correct parent for mux clocksGravatar Swapnil Jakhade 1-5/+26
2021-12-27phy: cadence: Sierra: Update single link PCIe register configurationGravatar Swapnil Jakhade 1-1/+213
2021-12-27phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operationGravatar Swapnil Jakhade 1-1/+72
2021-12-27phy: cadence: Sierra: Check cmn_ready assertion during PHY power onGravatar Swapnil Jakhade 1-0/+45
2021-12-27phy: cadence: Sierra: Add PHY PCS common register configurationsGravatar Swapnil Jakhade 1-0/+38
2021-12-27phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra ...Gravatar Swapnil Jakhade 1-10/+11
2021-12-27phy: cadence: Sierra: Add support to get SSC type from device treeGravatar Swapnil Jakhade 1-1/+5
2021-12-27phy: cadence: Sierra: Prepare driver to add support for multilink configurationsGravatar Swapnil Jakhade 1-56/+139
2021-12-27phy: cadence: Sierra: Use of_device_get_match_data() to get driver dataGravatar Swapnil Jakhade 1-9/+4
2021-11-23phy: cadence-torrent: use swap() to make code cleanerGravatar Yang Guang 1-4/+2
2021-10-26phy: cadence-torrent: Add support to output received reference clockGravatar Swapnil Jakhade 1-11/+148
2021-10-26phy: cadence-torrent: Model reference clock driver as a clock to enable deriv...Gravatar Swapnil Jakhade 1-25/+132
2021-10-26phy: cadence-torrent: Migrate to clk_hw based registration and OF APIsGravatar Swapnil Jakhade 1-11/+19
2021-08-17phy: cadence-torrent: Check PIPE mode PHY status to be ready for operationGravatar Swapnil Jakhade 1-1/+59
2021-08-17phy: cadence-torrent: Add debug information for PHY configurationGravatar Swapnil Jakhade 1-4/+32
2021-08-17phy: cadence-torrent: Add separate functions for reusable codeGravatar Swapnil Jakhade 1-18/+35
2021-08-17phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clockGravatar Swapnil Jakhade 1-0/+162
2021-08-17phy: cadence-torrent: Add PHY registers for DP in array formatGravatar Swapnil Jakhade 1-288/+334
2021-08-17phy: cadence-torrent: Configure PHY registers as a function of input referenc...Gravatar Swapnil Jakhade 1-408/+422
2021-08-17phy: cadence-torrent: Add enum for supported input reference clock frequenciesGravatar Swapnil Jakhade 1-13/+38
2021-08-17phy: cadence-torrent: Reorder few functions to remove function declarationsGravatar Swapnil Jakhade 1-619/+588
2021-08-17phy: cadence-torrent: Remove use of CamelCase to fix checkpatch CHECK messageGravatar Swapnil Jakhade 1-12/+12
2021-05-31phy: cadence: Sierra: Fix error return code in cdns_sierra_phy_probe()Gravatar Wang Wensheng 1-0/+1
2021-03-31phy: cadence-torrent: Add delay for PIPE clock to be stableGravatar Kishon Vijay Abraham I 1-0/+9
2021-03-31phy: cadence-torrent: Explicitly request exclusive reset controlGravatar Kishon Vijay Abraham I 1-1/+1
2021-03-31phy: cadence-torrent: Do not configure SERDES if it's already configuredGravatar Kishon Vijay Abraham I 1-10/+22
2021-03-31phy: cadence-torrent: Group reset APIs and clock APIsGravatar Kishon Vijay Abraham I 1-31/+53
2021-03-31phy: cadence: Sierra: Enable pll_cmnlc and pll_cmnlc1 clocksGravatar Kishon Vijay Abraham I 1-3/+37
2021-03-31phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks)Gravatar Kishon Vijay Abraham I 2-3/+265
2021-03-31phy: cadence: Sierra: Add missing clk_disable_unprepare() in .remove callbackGravatar Kishon Vijay Abraham I 1-0/+3
2021-03-31phy: cadence: Sierra: Add array of input clocks in "struct cdns_sierra_phy"Gravatar Kishon Vijay Abraham I 1-10/+15
2021-03-31phy: cadence-torrent: Use a common header file for Cadence SERDESGravatar Kishon Vijay Abraham I 1-1/+1
2021-03-31phy: cadence: Sierra: Explicitly request exclusive reset controlGravatar Kishon Vijay Abraham I 1-2/+2
2021-03-31phy: cadence: Sierra: Move all reset_control_get*() to a separate functionGravatar Kishon Vijay Abraham I 1-11/+25
2021-03-31phy: cadence: Sierra: Move all clk_get_*() to a separate functionGravatar Kishon Vijay Abraham I 1-22/+35
2021-03-31phy: cadence: Sierra: Create PHY only for "phy" or "link" sub-nodesGravatar Kishon Vijay Abraham I 1-0/+4
2021-03-31phy: cadence: Sierra: Fix PHY power_on sequenceGravatar Kishon Vijay Abraham I 1-1/+6
2021-03-30phy: cadence-torrent: Update PCIe + USB config for correct PLL1 clockGravatar Swapnil Jakhade 1-16/+31
2021-03-30phy: cadence-torrent: Update SGMII/QSGMII configuration specific to TIGravatar Kishon Vijay Abraham I 1-14/+44
2021-03-30phy: cadence-torrent: Update PCIe + QSGMII config for correct PLL1 clockGravatar Swapnil Jakhade 1-28/+49
2021-03-30phy: cadence-torrent: Add support to drive refclk outGravatar Kishon Vijay Abraham I 2-3/+186
2021-01-13phy: cadence-torrent: Fix error code in cdns_torrent_phy_probe()Gravatar Dan Carpenter 1-0/+1
2020-11-16phy: cadence: convert to devm_platform_ioremap_resourceGravatar Chunfeng Yun 3-9/+3
2020-09-18phy: cadence-torrent: Add USB + SGMII/QSGMII multilink configurationGravatar Swapnil Jakhade 1-0/+254
2020-09-18phy: cadence-torrent: Add PCIe + USB multilink configurationGravatar Swapnil Jakhade 1-0/+216
2020-09-18phy: cadence-torrent: Add single link USB register sequencesGravatar Swapnil Jakhade 1-1/+259
2020-09-18phy: cadence-torrent: Add single link SGMII/QSGMII register sequencesGravatar Swapnil Jakhade 1-0/+89